Characteristic Analysis of Quasi Vertical Double Diffused Metal Oxide Semiconductor Field Effect Transistor

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研究生：	曾富群 Tseng, Fu-Chun
論文名稱：	Characteristic Analysis of Quasi Vertical Double Diffused Metal Oxide Semiconductor Field Effect Transistor 準垂直型雙擴散金氧半場效電晶體特性分析
指導教授：	龔正 Gong, J. 黃智方 Huang, Chih-Fang
口試委員:
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 半導體元件及製程產業研發碩士專班 Industrial Technology R&D Master Program on Semiconductor Devices and Manufacturing Process
論文出版年：	2010
畢業學年度：	98
語文別：	英文
論文頁數：	162
中文關鍵詞：	準垂直、雙擴散、金氧半場效電晶體
外文關鍵詞：	QVDMOS, QVDMOSFET, quasi vertical
相關次數：	點閱：1 下載：0
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Chinese Abstract
　　根據2D軟體模擬的結果並參考相關XtreMOSTM文獻，我們可以知道經過設計和最佳化的準垂直型雙擴散金氧半場效電晶體的確有高崩潰電壓的承受能力（97.89 V）、低特徵導通電阻（107.64 mΩ x mm2）以及小尺寸（28.2 x 1.0 μm2）等特性。此外，我們也提出了全新可以相匹配的準垂直型雙擴散金氧半場效電晶體（崩潰電壓為99.64 V、特徵導通電阻為120.90 mΩ x mm2以及尺寸為28.0 x 1.0 μm2）。此篇論文主要研究了準垂直型雙擴散金氧半場效電晶體內部的各個結構尺寸或濃度變化對崩潰電壓和特徵導通電阻的影響。可提供後繼研究者的一個參考。

English Abstract
In this thesis computer aided simulation tools are used to design a Quasi Vertical Double Diffused Metal Oxide Semiconductor Field Effect Transistor (QVDMOSFET). The proposed new structure QVDMOSFET has breakdown voltage BVOFF = 99.64 V ; specific turn-on resistance RON,SP = 120.90 mΩ x mm2; and area size = 28.0 x 1μm2) . This thesis provides the research results of structural effect influence on BVOFF and RON,SP in QVDMOSFET.

Table of Contents
Chinese Abstract.,,..I
English Abstract..,,.I
Acknowledgements....II
Table of Contents..III
CHAPTER1  Overview    1
1  Introduction    1
1.1  Motivation of This Thesis    1
1.2  Framework of This Thesis    2
CHAPTER2  Power MOSFET    3
1  Structure and Operation Principles of Power MOSFET    4
1.1  V-groove MOSFET    4
1.2  U-groove MOSFET    6
1.3  DMOSFET    7
1.4  LMOSFET    9
2  Basic Characteristics of Power MOSFET    11
2.1  Impact Ionization & Avalanche Breakdown    12
2.2  Dielectric Breakdown    15
2.3  Second Breakdown    15
3  Key Performance Index    17
3.1  Channel Length    17
3.2  On-resistance    19
3.3  Threshold Voltage    20
4  Available Improvement Structure of Breakdown Voltage and On Resistance    22
4.1  Lightly Doped Drain (LDD)    22
4.2  Lateral Double Diffused MOSFET (LDMOS)    22
4.3  Reduced SURface Field (RESURF)    24
4.4  Double RESURF    26
4.5  Trench Drain Structure    27
4.6  Field Plate    28
4.7  P-buried Layer    30
4.8  N-buried Layer    30
4.9  P-sinker    31
4.10  Recessed Gate    31
4.11  Trench MOSFET (TMOS)    33
4.12  Rectangular-grooved MOSFET (RMOSFET)    34
4.13  UMOSFET    35
4.14  Graded Doped (GD) Trench Gate MOSFET    36
4.15  Super-junction (SJ)    37
CHAPTER3  Quasi Vertical Double Diffused Metal Oxide Semiconductor Field Effect Transistor (QVDMOSFET) Process and Device Characteristic    43
1  Device Structure & Operation Theory    43
2  Theory of Main Experimental Parameters    45
2.1  Off-breakdown Voltage (BVOFF)    50
2.2  Specific On-resistance (RON,SP)    53
2.3  Threshold Voltage (VTH)    54
3  Process for Fabricating power QVDMOSFET Device    56
3.1  P-type Wafer Preparation    56
3.2  Grow P-epitaxial Layer    56
3.3  Deposit Pad Oxidation    56
3.4  Mask1:  N-type Buried Layer (NBL) Implant    57
3.5  Mask2:  P-type Buried Layer (PBL) Implant    57
3.6  Grow N-epitaxial Layer    58
3.7  Mask3:  Etch Silicon (1st Gate Trench Etch)    58
3.8  Mask4:  N-sinker (Drain) 1st Implant    59
3.9  Mask5:  P-sinker (Bulk) 1st Implant    59
3.10  Well Drive-in    60
3.11  Deposit Pad Oxide and Nitride Layer    60
3.12  Mask6:  2nd Gate Trench Etch    61
3.13  Field Oxidation (FOX)    61
3.14  Isotropic Etch Oxide    62
3.15  HV Gate Oxidation    62
3.16  Deposit Poly-silicon    63
3.17  Isotropic Etch of Poly-silicon    63
3.18  Mask7:  Implant Boron    64
3.19  Mask8:  Implant Phosphorous    64
3.20  Mask9:  Implant BF2    65
3.21  Boro-Phospho-Silicate-Glass (BPSG) Diffusion    65
3.22  Mask10:  Etch oxide    66
3.23  Deposit Aluminum    66
3.24  Mask11:  Etch Aluminum    67
3.25  Final Structure of QVDMOSFET    67
CHAPTER4  2D Simulation    68
1  Definitions of Simulation Parameters    68
2  Parameters Modulation of Simulation    70
2.1  Concentration of 2nd N-sinker Implant    70
2.2  Concentration of 2nd P-sinker implant    71
2.3  Concentration of 1st N-sinker implant    73
2.4  Concentration of 1st P-sinker implant    76
2.5  Concentration of N-epitaxial Layer Growth    78
2.6  Concentration of P-epitaxial Layer Growth    81
2.7  Concentration of NBL implant    84
2.8  Concentration of PBL implant    87
2.9  Without PBL or P-sinker    89
2.10  Without NBL or N-sinker    92
2.11  Length between Gate and Drain (LGD)    95
2.12  Length between Drain and Bulk (LDB)    97
2.13  Sequence of 2nd Gate Trench Etching    100
2.14  Thickness of Gate Oxide (TOX1)    102
2.15  Thickness of Field Oxide (TOX2)    105
2.16  Thickness of N-epitaxial Layer (TNEpi)    109
2.17  Depth of Gate Trench    113
2.18  Depth of N-sinker (TD)    115
2.19  Length of Gate (C )    117
3  Device Characteristics of Simulation    119
3.1 Device Characteristics with Variation of Lateral Source Quantity (Q)    119
3.2  BVOFF to RON,SP    133
4  Newly Proposed Structure    134
4.1  Characteristics Analysis of Newly Structure    135
4.2  Compare Newly Proposed Structure with Optimized QVDMOSFET    138
6  Layout of QVDMOSFET    152
7  Discussion    155
CHAPTER5  Conclusions    158
Reference    159

                                

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