覆晶封裝技術具有極佳電性與良好的散熱能力，已可運用於高密度封裝體內。然而，因性能需求使封裝密度提高，促使每個凸塊接點所承受的電流負載達0.2A或更高。而高電流負載容易在封裝體的焊錫接點產生電遷移、熱遷移與擴散…等效應，造成電子產品可靠度問題。然而，目前相關研究著重於鋁、銅導線與覆晶封裝凸塊接點位置的電遷移效應，特別是接點位置所誘生的電流集中與空缺破壞現象。但是，封裝體內焊錫接點於通電時的熱特性研究，則受溫度量測限制仍未有明顯突破。故此，本研究特別藉由紅外線熱像儀(Infrascope)進行焊錫接點於通電時的溫度分佈量測，透過該量測不僅可獲得凸塊剖面與鋁導線局部溫度分佈，更可判斷相關接點位置溫升與溫度梯度等熱特性。此外，本研究也透過可解決實驗量測限制與節省實驗時間的有限元素熱電模型，進行通電下類似真實實驗試片的熱特性模擬。經過模擬與實驗比對後，可更進一步藉由有限元素模型分析相關參數對封裝體熱特性的影響情況。研究結果顯示在破壞性試片溫度量測實驗中，發現隨著電流增加凸塊內部平均溫升與溫度梯度隨之上升，特別在電流為0.43A的85%凸塊剩餘量中，凸塊內部平均溫升高達55.9°C，而溫度梯度高達333°C/cm。然而，非破壞性試片溫度量測實驗中，發現鋁導線為封裝體內主要發熱源。該試片在電流為0.59A下，轉折區鋁導線溫度達134°C，但是凸塊上方的鋁襯墊溫度僅有105°C。此外，量測中亦發現延伸鋁導線與鋁襯墊間的溫度梯度高達1,960°C/cm，故此，可推論該位置的溫度變化大，且於凸塊接點位置發現熱點(Hot spot)現象。本研究更藉由有限元素模型進行UBM電阻率、導線材料兩大類參數對封裝體熱特性的估算與分析。結果顯示當提高UBM電阻率參數時，雖然發現凸塊內部溫度升高，但是導線溫度梯度下降與遠離導線的凸塊內部垂直溫度梯度上升，表示熱量已慢慢均勻分佈於凸塊內部，恰好可改善熱點破壞接點問題。最後，鋁材置換為銅材導線參數的估算結果，發現因銅材導線具有低電阻率、高導熱係數可大幅降低凸塊內部平均溫升與溫度梯度，其最大值分別為10°C與651.4°C/cm。所以，鋁材置換成銅材導線的方法確實可減緩試片發生可靠度問題的最好方法。以上溫度量測與模擬方法，應在未來將在未來的封裝產業扮演重要的角色。

Flip chip technology has been adopted for high-density packaging due to its excellent electrical performance and better heat dissipation ability. As the required performance in microelectronic density becomes higher, the current that each bump needs to carry has reached 0.2A or higher ones in the future. Moreover, electromigration, thermalmigration, and diffusion effect be formed on the solder joint in packaging when under high current stressing. These effects will cause electronic devices to occur reliable problems. At present, almost researches focus on electromigration effect influence on aluminum, copper trace and solder joints in packaging, especially in current crowding and crack formation in solder joint. Because of temperature measuring limitation, only few researches focus on thermal characteristic in solder joint in Flip-Chip during current stressing. For this study, thermal infrared microscopy (Infrascope) was especially used to measure the temperature distribution inside the solder bump and aluminum trace at various stressing conditions. It also can help us to find some of thermal characteristics in the solder joint, such as temperature increasing and temperature gradient. Based on the experimental data, we also constructed a electric-thermal finite element model (FEA) to simulate the temperature distribution inside the solder bump during current stressing. After verification, only less than 1 % error is achieved between simulation data and experiment results. Then, many kinds of models were built up, which were used to predict different parameters influence on thermal characteristic in Flip-Chip packaging under high current stressing. Moreover, FEA model also helps us solve measuring limitation and save much time. Results of this study show that temperature increase and temperature gradient inside the solder bump were increased by the raised applied current in destructiveness model in temperature measuring. Besides, in the 85% remaining solder bump, temperature increase inside the solder bump was as high as 55.9°C and the temperature gradient reached to 333°C/cm under stressed by 0.43A. In another kind of non- destructiveness device, the measuring results showed that aluminum trace was the main heat generator in packaging. The measuring temperature around the corner of aluminum trace was as high as 134°C and the aluminum pad above the solder bump was only 105°C when it was stressed by 0.59A. Besides, it also showed that temperature gradient between the extending aluminum trace and pad reached to 1,960°C/cm. So, it means that temperature around this joint changed greatly and it could form a hot spot here. Another topic of this study, the FEA model was used to simulate and analyze different UBM resistivity and trace material influence on thermal characteristics in packaging. Although it showed that average temperature of solder bump was increased when UBM resistivity was enlarged, the temperature gradient of trace was decreased and the vertical temperature gradient of far away trace was raised. Therefore, it means that heat spread inside the solder bump and the hot spot effect could improve. When aluminum trace was replaced by copper trace in the packaging, the simulation results showed temperature increase and temperature gradient in the solder bump were decreased greatly, besides their maximum drop were 10°C and 651.4°C/cm, respectively. As a result, this phenomenon was caused by the copper trace, which was lower resistivity and higher thermal conductivity. Hence, it is a good way to slow down packaging to occur reliable problem. Finally, these ways of temperature measuring and simulation models will play an important role in packaging industry in the future.

[1] Rao R. Tummala, Fundamentals of Microsystem packaging: McGraw-Hill, 2002.
[2] San Jose, "The National Technology Roadmap for Semiconductors," 1997.
[3] K.N.Tu, "Recent advances on electromigration in very-large-scale-integration of interconnects," Journal of Applied Physics, vol. 94, pp. 5451~5473, 2003.
[4] Wu F Wang L, Wu Y, and Zhang J, "The effect of current crowding on electromigration in lead-free flip chip bump interconnect," presented at Proc. 6th IEEE CPMT Conference on High Density Microsystem Design and Packaging and Component Failure Analysis, Shanghai, China, 2004.
[5] Everett C.C. Yeh, W. J. Choi, and K. N. Tu, "Current-crowding-induced electromigration failure in flip chip solder joints," Applied Physics Letters, vol. 80, pp. 580, 2002.
[6] T. L. Shao, Y. H. Chen, S. H. Chiu, and C. Chen, "Electromigration failure mechanisms for SnAg3.5 solder bumps on Ti/Cr-Cu/Cu and Ni(P)/Au metallization pads.," Journal of Applied Physics, vol. 96, pp. 4518, 2004.
[7] D. J. Yao, C. Y. Hsu, C. Chen, and S. H. Chiu, "Thermal gradient in solder joints under electrical current stressing," in Proceedings of IPAK2005, ASME, Ed. San Francisco, California, USA, 2005.
[8] T.L. Shao, S.H. Chiu, C. Chen, D.J. Yao, and C.Y. Hsu, "Thermal gradient in solder joints under electrical-current stressing," Journal of Elecronic Materials, vol. 33, pp. 1350~1354, 2004.
[9] John H. Lau, Flip chip technologies: McGraw-Hill, New York, 1995.
[10] 鍾文仁、陳佑任, IC封裝製程與CAE應用: 全華出版社.
[11] IBM, "C4 Flip Chip Connection," IBM.
[12] Glenn A. Rinne, "Electromigration in SnPb and Pb-Free Solder Bumps," presented at Electronic Components and Technology Conference, 2004.
[13] K. L. Lee, C. K. Hu, and K. N. Tu, "In situ scanning electron microscope comparison studies on electromigration of Cu and Cu(Sn) alloys for advanced chip interconnects," Journal of Applied Physics, vol. 78, pp. 4428, 1995.
[14] M. Tammaro, "Investigation of the temperature dependence in Black's equation using microscopic electromigration modeling," Journal of Applied Physics, vol. 86, pp. 3612-3615, 1999.
[15] C. Y. Chang, ULSI Technology: McGRAW-HILL, 1996.
[16] T. F. Irvine Jr, "Handbook of Heat Transfer," J. P. H. W. M. Rohsenow, and Y. I. Cho, Ed. N. Y.: McGraw-Hill, 1998, pp. 21.
[17] V. V. Calmidi and R. L. Mahajan, presented at Electronic Components and Technology Conference, ECTC 97 Proceedings, 1997.
[18] J. W. Mayer and S. S. Lau, Electronic Materials Science: ForIntegrated Circuits in Si and GaAs: Prentice Hall, 1989.
[19] A. D. Kraus and A. B. Cohen, Thermal Analysis and Control of Electronic Equipment: Hemisphere, W. A., 1983.
[20] E. T. Ogawa, K. D. Li, V. A. Blaschke, and P. S. Ho, "Electromigration reliability issues in dual-damascene Cu interconnections," Reliability, IEEE Transactions on, vol. 51, pp. 403, 2002.
[21] D.G. Pierce and P.G. Brusius, "Electromigration: a review," Microelectron Reliability, vol. 37, pp. 1053-1072, 1997.
[22] Blech A, "Electromigration in thin aluminum films on titanium nitride," Journal of Applied Physics, vol. 47, pp. 1203-1208, 1976.
[23] T.Y. Lee, K. N. Tu, S.M. Kuo, and D.R. Frear, "Electromigration of eutectic SnPb solder interconnects for flip chip technology," Journal of Applied Physics, vol. 89, pp. 3189, 2001.
[24] S. Brandenburg and S. Yeh, "Electromigration Studies of Flip chip Bump Solder Joints," Surface Mount International Conference Proceedings, 1998.
[25] R.A.Johns and D.A. Blackburn, "Grain boundaries and their effect on thermonigration in pure lead at low diffusion temperatures," Thin Solid Films, vol. 25, pp. 291-300, 1975.
[26] G. J. Van Gurp, P. J. de Waard, and F. J. du Chatenier, "Thermomigration in indium and indium alloy films," Journal of Applied Physics, vol. 58, pp. 728, 1985.
[27] C. Q. RU, "Intrinsic instability of electromigration induced mass transport in a two-dimensional conductor," Acta Materialia, vol. 47, pp. 3571~3578, 1999.
[28] W.Roush and J.Jaspal, presented at Proceedings of the Electron.Compon.32nd Conference, San Diego,CA, 1982.
[29] H. Ye, C. Basaran, and D. Hopkins, "Thermomigration in Pb-Sn solder joints under joule heating during electric current stressing," Applied Physics Letters, vol. 82, pp. 1045, 2003.
[30] T. Y. T. Lee, T. Y. Lee, and K. N. Tu, presented at Proceedings of the 51th Electronic Components and Technology Conference, Orlando, Florida, USA, 2001.
[31] Frank Kreith and Mark S.Bohn, Principles of heat transfer.--6th ed., 2000.
[32] B. Z. Hong, "Thermal Fatigue Analysis of a CBGA Package with Lead-Fee Solder Fillets," presented at InterSociety Conference on Thermal Phenomena IEEE, 1998.
[33] Michael G. Pecht, Electronic packaging materials and their properties: Boca Raton, FL:CRC Press, 1999.
[34] John H. Lau, "Low Cost Flip Chip Technologies," McGraw-Hill, 2000, pp. 310.
[35] M. Abtew and G. Selvaduray, "Lead-Free Solders in Microelectronics," Materials Science and Engineering: R: Reports, vol. 27, pp. 95-141, 2000.
[36] Thomas Siewert, Stephen Liu, David R. Smith, and Juan Carlos Madeni, Properties of Lead-Free Solders(Release 4.0), vol. Database for Solder Properties with Emphasis on New Lead-free Solders: National Institute of Standards and Technology, Colorado School of Mines, 2002.
[37] C.M. Lu, T.L. Shao, C.J. Yang, and C. Chen, "Microstructure evolution during electromigration in eutectic SnPb solder bumps," Journal of Materials Research, vol. 19, pp. 2394-2401, 2004.
[38] Ying-Chao Hsu; Tung-Liang Shao; Ching-Jung Yang; Chih Chen, "Electromigration Study in SnAg3.8Cu0.7 Solder Joints on Ti/Cr-Cu/Cu Under-Bump Metallization," Journal of Electronic Materials, vol. 32, pp. 1222-1227, 2003.
[39] J. W. Nah, K. W. Paik, and J. O. Suh, "Mechanism of electromigration-induced failure in the 97Pb-3Sn and 37Pb-63Sn composite solder joints," Journal of Applied Physics, vol. 94, pp. 7560, 2003.