我們在覆晶式(flip-chip)封裝(package)的架構下，針對預先配置接角(pre- assigned pin)的考量，提出了一個全域繞線(global routing)以及詳細繞線(detailed routing)的演算法。此演算法考慮了非單調繞線(non-monotonic route)、跨區域的線(cross section
fly-lines)、線的容量(wire capacity)、線長最小化(wirelength
minimization)以及可以處理預先配置接角的問題。全域繞線演算法包括依序繞線(ordered routes)、切開跨區域的線(split the cross
section fly-lines)以及非單調繞線(non-monotonic route)的理。詳細繞線演算法包括設定錨點(set-anchers)、斜線繞線(oblique
corner routes)以及精細的改進(refinements)。實驗結果顯示我們的演算法以非常快的速度達到100%的繞線率，並且速度比[6]快20倍。經由詳細繞線演算法可以得到線長最小化過的結果。

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