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研究生: 蔣秉中
Chiang, Ping-Chung
論文名稱: 基於頻率合成器之 2.4-GHz 全數位控制式二進制頻移鍵控發射器
A 2.4-GHz Fully Digital-Controlled Synthesizer-based Binary Frequency-Shift Keying Transmitter
指導教授: 謝志成
Hsieh, Chih-Cheng
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 英文
論文頁數: 119
中文關鍵詞: 射頻發射器二進制頻移鍵控頻率合成器數位濾波器鎖相迴路逐次漸進式暫存器
外文關鍵詞: RF Transmitter, Binary Frequency-Shift Keying, Synthesizer, Digital filter, Phase-locked loop, Successive approximation register
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  • 本論文主旨為設計一個應用於 2.4-GHz 工業/科學/醫學無線通訊頻段的完全數位式控制二進制頻移鍵控調變射頻發射(Binary Frequency-Shift Keying Transmitter),相較於類比式控制發射器,此架構對於製程變化以及雜訊干擾較不敏感,發射器是以數位逐次漸近暫存器迴路以及數位式相位控制迴路所實作,前者用作校正初始輸出頻率,而後者則是用以補償其輸出頻率偏移量,運用兩者以達到快速且準確的資料傳輸。
    此發射器的核心部分為一個數位式控制震盪器(DCO),而其中的壓控電容是採用兩級的切換電容陣列,並外加兩個電容來降低電容切換的變化量。數位逐次漸近暫存器迴路以及數位式相位控制迴路則運用閘控鏈波計數器估算輸出頻率。在進行二進制數位資料調變傳輸前,先由數位逐次漸近暫存器迴路產生邏輯零以及壹訊號所對應的數位控制振盪器控制碼(OTW)並記錄至暫存器中。在進行資料傳輸時,數位式相位控制迴路啟動使得輸出頻率維持在期望輸出頻率的範圍內。
    此設計利用台灣積體電路製造股份有限公司的互補式金屬-氧化層-半導體0.18微米製程來實現,整個晶片的面積大小為1 × 1平方毫米。根據量測結果,輸出頻率範圍為2.327 ~ 2.405 GHz,相位雜訊在偏離中心的載波頻率1 MHz位移處低於 -79.8 dBc/Hz的雜訊程度。在最高的資料傳輸速率下(250-kbps),輸出的頻率誤差約在500 kHz以內。整體的功率消耗在1.8 V的電壓供應下約為17.6 mW。


    This thesis presents a fully digital-controlled binary frequency-shift keying (BFSK) RF transmitter for 2.4-GHz Industrial, Science, and Medical band (ISM-band) applications. Compared with analog-controlled transmitters, this one is much less to the process variation and noise interference. The transmitter control scheme is realized by a successive approximation register (SAR) loop and a digital phase control loop. The former loop is used to calibrate the initial output frequency, and the latter is used to compensate the output frequency drift. By incorporating both loops, fast and accurate data transmission can be achieved.
    The key block of the transmitter is a digitally controlled oscillator (DCO). Its varactor is composed of two switched-capacitor arrays. Two extra capacitors are added for reduction of the capacitance variation. A gated ripple counter is used to estimate the DCO frequency for the SAR and phase control loops. Before data transmission, the SAR loop generates and stores the oscillation tuning words (OTW) of DCO for logic-0 and 1. During data transmission, the phase control loop is enabled to maintain the DCO frequency close to the desired one.
    This design is implemented in TSMC 0.18-μm 1P6M CMOS process and its chip area is 1 □× 1 mm2. According to measurement results, the oscillation frequency range is 2.327 ~ 2.405 GHz, and the phase noise is below -79.8 dBc/Hz at 1 MHz offset. For 250-kbps data transmission, the frequency error is less than 500 kHz. The total power consumption is around 17.6 mW under 1.8 V power supply.

    Chapter 1 Introduction 1.1 Background 1.2 Motivation 1.3 Thesis Organization Chapter 2 Fully Digital-Controlled Closed-Loop BFSK Transmitter 2.1 Introduction 2.2 Design Specifications of BFSK Transmitter 2.2.1 Frequency Band, Tuning Range, Resolution, and Accuracy 2.2.2 Phase Noise 2.2.3 Loop Bandwidth and Stability of Phase Control Loop 2.2.4 Proposed BFSK Transmitter Specification 2.3 BFSK Transmitter Architecture 2.3.1 Architecture Overview 2.3.2 Frequency Generation for Transmission Data 2.3.3 Long Time Frequency Shift Calibration 2.4 Summary Chapter 3 Digitally Controlled Oscillator 3.1 Digitally Controlled LC-Tank Oscillator 3.1.1 LC-Tank Oscillator Overview 3.1.2 Negative Resistance Circuit 3.1.3 TSMC Spiral Inductor 3.1.4 Switched-Capacitor Array 3.2 Full-Swing Buffer and Output Buffer 3.3 Bias Circuit 3.4 Simulation Results 3.5 Summary Chapter 4 Digital Frequency and Phase Control Loop 4.1 Successive-Approximation-Register Frequency Control Loop 4.1.1 Digital Frequency Detector 4.1.2 Successive-Approximation-Register Controller 4.2 Digital Phase Control Loop 4.2.1 Digital Phase Detector 4.2.2 Digital Loop Filter Filter 4.3 Simulation Results 4.4 Summary Chapter 5 Chip Implementation and Measurement Results 5.1 BFSK Transmitter Implementation 5.1.1 Transmitter Operation 5.1.2 Behavior Simulation 5.1.3 Layout Considerations 5.2 Chip Measurement 5.2.1 Measurement Setup 5.2.2 Measurement Results 5.3 Summary Chapter 6 Conclusion and Future Work 6.1 Conclusion 6.2 Future Work

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