我們提出了一個可組態乘法器的功率消耗估計模型，這個估計模型可以預估各種不同組態的乘法器的功率消耗。我們提出的功率消耗模型中，特徵值抽取所需的運算資源被大幅度地減少。使用者可以將要輸入可組態乘法器的資料流，直接輸入到我們提出來的模型以得到估計的功率消耗，這個功率消耗估計模型可以在系統架構抽象層，幫助設計者針對乘法運算的功率消耗做最佳化的動作。我們提出的功率消耗估計模型在積體電路前期的設計階段就可以估計出可靠的功率消耗，大約有百分之三十二的錯誤率，而錯誤率的標準差是百分之十四左右。

We propose an architecture-level power estimation model for a configurable multiplier. The model can be automatically scaled with respect to different configurations of multiplier. Large amount of characterization effort is reduced. The user can directly feed the input sequences of a configurable multiplier to this model and derive the estimated average power consumption. This model can assist the designer to optimize the power consumption of multiplication operation at architecture-level abstraction. . The proposed model can efficiently estimate the power consumption at the early design stage, and yields average estimation errors around 32%. The standard deviation of the average error is around 14%.

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