研究生: |
黃裕文 Yu-Wen Huang |
---|---|
論文名稱: |
3.5-GHz無電感互補式金氧半射頻前端電路 A 3.5-GHz Inductorless CMOS RF Front-End |
指導教授: |
柏振球
Jenn-Chyou Bor |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
論文出版年: | 2007 |
畢業學年度: | 96 |
語文別: | 中文 |
論文頁數: | 116 |
中文關鍵詞: | 射頻前端 、低雜訊放大器 、主動電感 、互補式金氧半 |
外文關鍵詞: | RF Front-End, LNA, Active Inductor, CMOS |
相關次數: | 點閱:2 下載:0 |
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本論文的目標,在於實現一個射頻前端電路(RF front-end),在不使用被動電感的條件下,應用於WiMAX標準中,在三點五千兆赫茲的頻帶。而在考慮輸入端及輸出端之阻抗匹配的議題下,提出一個共閘級式(common gate configuration)的低雜訊放大器,並且使用一些技巧,在增益、雜訊0以及消耗功率的部份做了改進。
為了增強此一低雜訊放大器之增益,分析並改進一個主動電感負載,可以在高頻時應用。藉著所提出的架構,可以用極低功率消耗的代價下,得到一個品質係數增進的主動電感。藉由模擬得知,使用一個主動電感當作負載的低雜訊放大器,只需要額外多消耗六百微安培,就能使其增益多增加九分貝。至於降頻器的設計,本論文所採用的是一個雙平衡吉爾伯特單元。
所設計的低雜訊放大器電路,是用台積電所提供的互補式金屬氧化半導體點一八微米之製程來實現。量測結果中,所測得的低雜訊放大器之增益為七分貝於二點三千兆赫茲,雜訊指數為五點二分貝,一分貝壓縮點為負九點八dBm,三階交調點為負三點六dBm。在一點八伏特的供應電壓下,所需要消耗的所有電流量共為九毫安培。整個晶片的面積,含墊鍵在內為零點四九平方毫米,而無電感的低雜訊放大器與輸出緩衝器,只佔了零點一毫米乘上零點四微米的面積。
The design target of this thesis is to carry out a radio frequency (RF) frond-end circuit without inductor at 3.5 GHz for the WiMAX applications. For the matching issue, a common-gate low-noise amplifier (LNA) circuit was proposed with some skills for gain, noise and power issues.
To enhance the gain of LNA, a high frequency active inductor load was analyzed. The quality factor of active inductor can be improved by the proposed topology with low power consumption. By simulation, the gain of LNA with active inductor load can be improved by 9 dB with extra 600 µA current consumption. As for the mixer, a double-balanced Gilbert cell is adopted.
The designed LNA circuits were implemented in TSMC CMOS 0.18-µm technology. The measured LNA gain was 7 dB at 2.3 GHz, with NF 5.2 dB, P1dB -9.8 dBm and IIP3 -3.6 dBm. The total current consumption was 9 mA under 1.8 V supply voltage. The whole chip area was 700 µm ×700 µm including pads.
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