隨著科技的演進，無線與有線通訊的傳輸速率要求也隨之增加，行動通訊系統也從2G 一路演進到目前最新的6G，而有線通訊中的電腦匯流排也從PCI-E1到PCI-E6了，在2005年，PCIe已近乎成為新的個人電腦主機板標準。
關於此有不少評論，但最基本的原因是它對於軟體開發者完全透明—為PCI所設計的作業系統可以不做任何代碼修改來啟動PCIe裝置。其二，它能增強系統效能，還有強有力的品牌認知。各類網卡、音效卡、顯示卡，以及當下的NVMe固態硬碟都使用了PCIe標準。本論文提出一個應用在 PCI-E4 所定義的16億赫茲的鎖相迴路，主要組成電路有相位頻率檢測器、電流幫浦、晶片內的迴路濾波器、可選頻帶之 LC壓控震盪器、除頻器，利用回授電晶體降低電流幫浦的非理想效應。
本論文採用台積電所提供之六十五奈米 CMOS 製程進行模擬設計，論文開頭為介紹鎖相迴路架中很重要的雜訊抖動概念，再來介紹震盪器的細節操作與實現方式，第三章介紹鎖相迴路子電路的功能與動機，第四章介紹數學模式去預測鎖相迴路的表現與轉移函數，再用Verilog-A來建構理想模型，第五章將每塊子電路實現跟整個迴路的模擬測試。

With the evolution of technology, the transmission rate requirements of wireless and wired communication have also increased. The mobile communication system has also evolved from 2G to the latest 6G, and the computer bus in wired communication has also changed from PCI-E1 to PCI-E6. Well, in 2005, PCIe had nearly become the new PC motherboard standard.
There are many comments on this, but the most basic reason is that it is completely transparent to the software developer - an operating system designed for PCI can boot a PCIe device without any code changes. Second, it enhances system performance, as well as strong brand recognition. Various network cards, sound cards, graphics cards, and current NVMe SSDs use the PCIe standard. This thesis proposes a phase-locked loop of 1.6 gigahertz defined by PCI-E4, which mainly consists of a phase frequency detector, a current pump, a loop filter in the chip, an LC voltage-controlled oscillator with a selectable frequency band, A frequency divider that uses a feedback transistor to reduce the non-ideal effects of the current pump.
This paper adopts the 65nm CMOS process provided by TSMC for simulation design. The paper starts with an introduction to the very important concept of noise jitter in the phase-locked loop frame, and then introduces the detailed operation and implementation of the oscillator. Chapter 3 Introduce the function and motivation of PLL subcircuits. Chapter 4 introduces mathematical models to predict the performance and transfer function of PLLs, and then uses Verilog-A to construct an ideal model. Chapter 5 describes the implementation of each subcircuit and the entire circuit. mock test.

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