研究生: |
蔡宗達 Tsai, Chung-Ta |
---|---|
論文名稱: |
使用合成漣波磁滯控制機制的快速暫態響應降壓式轉換器 A Fast Response Buck Converter Using Synthetic Ripple Hysteresis Control Scheme |
指導教授: |
周懷樸
Chou, Hwai-Pwu |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
原子科學院 - 工程與系統科學系 Department of Engineering and System Science |
論文出版年: | 2009 |
畢業學年度: | 98 |
語文別: | 中文 |
論文頁數: | 82 |
中文關鍵詞: | 磁滯控制 、合成漣波 、快速暫態 、磁滯帶調變 |
外文關鍵詞: | hysteresis control, synthetic ripple, fast transient, hysteresis band modulation |
相關次數: | 點閱:1 下載:0 |
分享至: |
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
本論文提出一個使用合成漣波磁滯控制機制的直流對直流降壓型轉換器,具有快速暫態響應路徑可以定義磁滯帶( Hysteresis band)寬度。在負載電流改變時,磁滯帶寬度、切換頻率與責任週期同時調變以加速穩壓,因此可減少輸出電壓之回復時間與過驅電壓,改善暫態響應。由於本論文提出之架構除了輸出電感與電容,不需要其他外部補償元件,因此可節省電路板面積,適用於可攜式裝置。全電路使用TSMC 0.35μm 2P4M的製程技術做設計與模擬分析,晶片之面積為1914μm × 2096μm,電路輸入電壓範圍為2.7V-4.2V,輸出電壓為2V。全晶片模擬結果顯示當負載電流在100毫安與500毫安間變化時,輸出電壓回復時間在10微秒以內,最大轉換效率為85.74%。
This thesis presents an integrated DC-DC buck converter using the synthetic ripple hysteresis control scheme with a fast transient path to define the boundary of hysteresis band. The hysteresis band and switching frequency depend on load current changes; therefore, it accelerates regulation and reduces overshoot. The present work requires no external compensation capacitors and can be implemented with integrated technology for on-chip applications. The whole chip is designed and simulated with TSMC 0.35μm 2P4M fabrication process data. The input supply voltage range of this work is 2.7V-4.2V, and the output voltage is 2V. The chip area is 1914μm × 2096μm. Full chip simulation results indicated output voltage recovery time is shortened within 10µs under load current condition between 100mA to 500mA, and the maximum conversion efficiency is 85.74%.
1. D. Maksimovic, “Power Management Model and Implementation of Power Management ICs for Next Generation Wireless Applications,” Tutorial presented at the International Conference on Circuits and Systems (ISCAS), 2002
2. Hoi Lee, Philip K. T. Mok and Ka Nang Leung, “Design of Low-power Analog Drivers Based on Slew-rate Enhancement Circuits for CMOS Low-dropout Regulators,” IEEE Trans. Circuits and Systems II, vol. 52, pp. 563-567, Sep. 2005
3. Favrat P., Deval P., Declercq and M.J., “A High-efficiency CMOS Voltage Doubler,” IEEE J. Solid-State Circuit, vol. 33, pp. 410-416, Mar. 1998
4. Robert W. Erickson, Dragan Maksimovic, Fundamentals of Power Electronics, 2nd ed., Norwell, MA, Kluwer, 2001
5. Jeff Falin,「智慧型手機電源管理系統的設計」,零組件雜誌,六月號,2004
6. Renno Ressity,「行動子系統對電源管理的設計需求」,電子工程專輯,2003
7. Feng Su, Wing-Hung Ki and Chi-Ying Tsui, “Ultra Fast Fixed-Frequency Hysteretic Buck Converter With Maximum Charging Current Control and Adaptive Delay Compensation for DVS Applications,” IEEE J. Solid-State Circuit, vol. 43, pp. 815-822, Apr. 2008
8. Yu-Huei Lee, Shih-Jung Wang, Chun-Yu Hsieh and Ke-Horng Chen, “Current Mode DC-DC Buck Converters With Optimal Fast-transient Control,” IEEE International Symposium on Circuits and Systems, pp. 3045-3048, May. 2008
9. J. Abu-Qahouq, H. Mao and I. Batarseh, “Multiphase Voltage-mode Hysteretic
Controlled DC–DC Converter with Novel Current Sharing,” IEEE Trans. Power
Electron., vol. 19, pp. 1397–1407, Nov. 2004
10. Castilla M., de Vicuna L.G., Guerrero J.M., Matas J. and Miret, J., “Designing VRM
Hysteretic Controllers for Optimal Transient Response”, IEEE Trans. Industrial
Electron., vol. 54, pp. 1726–1738, Jun. 2007
11. Mishra, S.K., Ngo, K.D.T., “Dynamic Characterization of the Synthetic Ripple
Modulator in a Tightly Regulated Distributed Power Application,” IEEE Trans.
Industrial Electron., vol. 56, pp. 1164–1173, Apr. 2009
12. Ngo, K.D.T., Mishra, S.K. and Walters, M., “Synthetic-ripple modulator for synchronous buck converter,” IEEE Power Electron Lett., vol. 3, no. 4, pp. 148–151, Dec. 2005
13. Qahouq J.A.A., Abdel-Rahman O., Huang, L. and Batarseh, I., “On Load Adaptive Control of Voltage Regulators for Power Managed Loads: Control Schemes to Improve Converter Efficiency and Performance,” IEEE Trans. Power Electron., vol. 22, pp. 1806–1819, Sep. 2007
14. Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill Companies Inc., 2001
15. Sedra Smith, Microelectronic CIRCUITS, 5th ed., Oxford, New York, 2004
16. Phillip E. Allen, Douglas R. Holberg, CMOS Analog Circuit Design, 2nd ed., Oxford, New York, 2002
17. R. Gregorian, Introduction to CMOS Op-Amps and Comparators, Wiley, New York, 1999
18. C. Yoo, “A CMOS buffer without short-circuit power consumption,” IEEE Trans. Circuits Syst. II, vol. 47, p.p. 935–937, Sep. 2000
19. C. F. Lee and P. K. T. Mok, “A Monolithic Current-Mode CMOS DC-DC Converter With On-Chip Current-Sensing Technique,” IEEE J. Solid-State Circuits, vol. 39, pp. 3-14, Jan. 2004
20. M. Keramat, Z. Tao, “A Capacitor Mismatch and Gain Insensitive 1.5-bit/Stage Pipelined A/D Converter,” 43rd IEEE Midwest Symp. On Circuit and systems, vol.1, pp. 48-51, 2000
21. M. Siu, P. K. T. Mok, K. N. Leung, Y. H. Lam and W. H. Ki, “A Voltage-mode PWM Buck Regulator with End-Point Prediction,” IEEE Trans. Circuits and Systems II, vol. 53, no. 4, pp. 294-298, Apr. 2006
22. W. Huang, “A New Control for Multi-phase Buck Converter with Fast Transient Response,” IEEE APEC, pp. 273–279, Mar. 2001
23. J. Sun, “Characterization and Performance Comparison of Ripple-based Control for Voltage Regulator Modules,” IEEE Trans. Power Electron., vol. 21, pp. 346–353, Mar. 2006
24. Han-Hsiang Huang, “Adaptive Window Control (AWC) Technique for Hysteresis DC- DC Buck Converters With Improved Light and Heavy Load Performance,” National Chiao Tung University, MS. Thesis, 2009
25. ISL6264, “Two-Phase Core Controller for AMD Mobile Turion CPUs,” Datasheet, Intersil Inc., Jul. 2007