化合物半導體在本質上有著高電子遷移率、半絕緣性基材的優點，因此可預期的將有優於矽材料在MIS的應用。藉由金氧半(MOS)相關元件，高頻率無線通訊、高速率運算和微波高能量之運用將能夠被實現。使用高介電常數(□)材料可以直接解決尺規上的量子限制。在化合物半導體元件應用上有著很重要的挑戰，那就是要得到一個存在著低的態密度(Dit)和低的漏電流在電性與熱力學上皆很穩定的絕緣層，用來鈍化保護半導體的表面。令人注目地，我們先前的研究關於在砷化鎵(GaAs)上成長氧化鎵氧化釓Ga2O3(Gd2O3)之混合氧化物用來鈍化保護砷化鎵的表面，成功的提供了擁有低的態密度與低的漏電流之金氧半二極體(MOS diode)。接著我們利用此氧化鎵氧化釓Ga2O3(Gd2O3)之混合氧化物當作閘極的介電層，再加上離子佈值(ion implantation)，我們成功地製作出空乏型與增強型砷化鎵金氧半場效電晶體(GaAs MOSFETs)。我們研究發現利用純的氧化釓(Gd2O3 □=14)異質磊晶在砷化鎵(100)基材做為鈍化保護，顯現出絕佳的絕緣能障。
此論文中，快速昇溫熱處理 Rapid thermal processing (RTP)，改變不同的昇溫速率(20°C/sec and 10°C/sec)昇溫至600°C，並且在不同的氣體環境(N2, H2 and forming gas)，用來研究此氧化鎵氧化釓Ga2O3(Gd2O3)之混合氧化物/砷化鎵(GaAs)異質結構的變化。另一個退火製程到780°C在超高真空下進行。利用RTP在不同氣體環境退火之後，介面較粗糙的程度為0.5-0.8 nm 。研究結果指出在較慢的昇溫速度下可以得到較為平整的介面。此外，利用x-ray reflectivity (XRR)和高解析度穿透式電子顯微鏡(HRTEM)研究，能夠得到在UHV下適當的退火製程可以維持平整與陡峭的介面，介面的粗糙度可以低於0.2 nm 以下。由此可以表示氧化鎵氧化釓Ga2O3(Gd2O3)之混合氧化物/砷化鎵(GaAs)之間擁有良好的熱力學穩定性。在經過高溫的熱處理之後，此氧化物仍然保持著非晶質狀態，此為一非常重要的元件觀點。電流-電(I-V)和電容-電壓(C-V)的量測顯示出低的漏電流(10-8 to 10-9 A/cm2)、高的介電常數(□ = 15)、積聚(accumulation)和反轉(inversion)指出在閘極介電質和砷化鎵(GaAs)之間有著低的態密度(Dit)。以金氧半電晶體元件考量，在經過高溫熱退火處理以活化參雜離子之後，閘極介電質和砷化鎵之間仍然保持著平整的介面，確保低的態密度和維持通道中高的載子遷移率。
另一個研究中，利用新的高介電材料氧化鉿(HfO2 □ = 20)和氧化鈧(Sc2O3 □ = 12)利用分子束磊晶在不同的條件下成長用以鈍化保護砷化鎵表面。近來氧化鉿(HfO2)薄膜用來取代二氧化矽在矽工業上面(for 45 nm CMOS)作為閘極介電層。氧化鉿(HfO2)在一系列不同的溫度下利用很獨特的in-situ多腔體系統來成長，並且藉由許多種類的儀器研究個別之特性。在室溫成長非晶質氧化鉿(HfO2)69 Å在砷化鎵(GaAs)基材上有著低的漏電流密度10-5 A/cm2在1 MV/cm 的電場，而室溫成長非晶質氧化鈧(Sc2O3)在砷化鎵上的漏電流密度為10-9A/cm2在1 MV/cm 的電場，並且崩潰電場強度為2.5-3.0 MV/cm 。從高解析度穿透是電子顯微鏡的影像可以看出非常陡峭接近一個原子層級平整的介面。磊晶的性質以X光繞射(X-ray diffraction)來分析之。非晶質的介電質材料薄膜常常為較佳形式，起因為缺少許多晶界作為容易的漏電通道。參雜一些其他的化學添加物(例如鋁、矽)來增加非晶質氧化鉿的再結晶溫度是我們正在努力的研究方向。另一方面，我們成功的提出，in-situ熱退火處理得到再結晶的薄膜，接著在高一些的溫度再成長另一層氧化鉿薄膜，可以得到一高品質的異質磊晶氧化鉿薄膜成長於砷化鎵的基材上。氧化物的表面與介面粗糙度可以利用XRR和HRTEM來分析之。氧化物的表面形貌可以利用原子力顯微鏡atomic force microscopy (AFM)分析之。另一延續的分析為利用X光光電子光譜儀x-ray photoelectron spectroscopy(XPS)研究介面的結構與成分。

The compound semiconductor essentially offer the advantages of high electron mobility and semi-insulating substrate, thus to be anticipated outperform Si in MIS applications. High-frequency wireless communications, high-speed computations, and microwave high power applications could be realized by devices based on MOS type related structures. Using High□ □ Dielectrics is a direction solving scaling quantum limit. To obtain electrically and thermodynamically stable insulator for surface passivation that exhibits a low density of state (Dit) and low leakage current is one important critical challenge in the compound semiconductor device processing. Remarkably, our earlier work of in-situ deposition of Ga2O3(Gd2O3) for GaAs passivation producing low Dit and low electrical leakage MOS (metal oxide semiconductor) diode. Subsequent put in use Ga2O3(Gd2O3) as gate dielectric with ion implantation demonstrated a successful depletion-mode and enhancement-mode GaAs MOSFETs. We also discovered that using pure Gd2O3 (□=14) epitaxially growing on GaAs (100) substrate for passivation, showing an excellent insulting barrier.
In first work, Rapid thermal processing (RTP) with different ramping rates of 20°C/sec and 10°C/sec to 600°C (holding at temperature in 30 seconds) and under various gases of N2, H2 and forming gas was used to anneal the Ga2O3(Gd2O3)/GaAs heterostructures. Another anneal to ~780°C under ultra high vacuum (UHV) was also performed. The interface was rough in the order of 0.5-0.8 nm after the RTP at different gases. We found that a slower ramping rate gives a smoother interface. Moreover, Studies using x-ray reflectivity (XRR) and high resolution transmission electron microscope (HRTEM) have shown that samples properly annealed under UHV have maintained smooth and abrupt interfaces with the interfacial roughness being less than 0.2 nm. This indicates the thermodynamic stability between Ga2O3(Gd2O3) and GaAs. The interfacial smoothness was maintained in the UHV anneal to ~780°C. After high temperature annealing, the oxide remains as amorphous the oxide remains as amorphous, an important aspect for device consideration. Current-voltage and capacitance-voltage measurements have shown low leakage currents (10-8 to 10-9 A/cm2), high dielectric constants (□ = 15), and accumulation and inversion, indicative of a low interfacial density of states (Dit) between gate dielectrics and GaAs. The attainment of a smooth interface between the gate dielectric and GaAs, even after high temperature annealing for activating implanted dopant, is a must to ensure the low Dit and to maintain high carrier mobility in the channel of the MOSFET.
In another work I have extended the investigation to new high □ dielectrics of HfO2 (□ = 20) and Sc2O3 (□ = 12) to passivate the GaAs(100) surface with different conditions by the MBE growth method. HfO2 films are recently used to replace SiO2 on Si industry for 45 nm CMOS as alternative gate dielectrics. We grow HfO2 films at elevated series temperature by using our unique in-situ multi-chamber system, using many kinds of instruments to research their different properties. I-V (current-voltage) and C-V (capacitance-voltage) measurements showed excellent electrical properties. The low leakage current density JE from growing amorphous 69 Å HfO2 film on GaAs at 1 MV/cm is 10-5 A/cm2, a 15nm thick Sc2O3 film showed a low leakage of 10-9A/cm2 at 1 MV/cm, and a breakdown field of 2.5-3.0 MV/cm. A very abrupt interface about one atomic layer thickness was observed by HRTEM. Epitaxial growth of (100) cubic HfO2 on GaAs (100) was also achieved by depositions at elevated temperature over 210℃. The property of epitaxial film is observed by X-ray diffraction. Dielectric films in amorphous form are usually preferred over the crystalline form due to the absence of grain boundaries as easy pathways of leakage. To raise the recrystallization temperature by mixing high □ HfO2 dielectrics with other chemical additions like Al and Si is underway. We demonstrate that in-situ annealing to obtain the recrystalized films and subsequent regrowth at higher temperature is a good way to achieve high quality epitaxial HfO2 films. The oxide surface and interfacial roughness were measured by XRR and HRTEM. The oxide film surface morphology is routinely measured by atomic force microscopy (AFM). Extensive analyses using XPS is now in progress to examine the interfacial structure.

CHAPTER Ⅰ

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CHAPTER Ⅱ

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CHAPTER Ⅲ

[1] H. T. Lue, C. Y. Liu, and C. Y. Tseng, IEEE Electronic Device Letters, 23, 553, (2002)

CHAPTER Ⅳ

[1] W. G. Lee, Y. J. Lee, Y. D. Wu, P. Chang, Y. L. Huang,, Y. L. Hsu, J. P. Mannaerts, R.L. Lo, F. R. Chen, S. Maikap, L. S. Lee, W. Y. Hsieh, M. J. Tsai, S. Y. Lin, T. Gustffson, M. Hong, and J. Kwo in 2004 International MBE conference, August 22-27, Edinburgh, Scotland.
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