High-Performance SIFT (Scale Invariant Feature Transform) Hardware Design for Efficient Image Feature Extraction

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研究生：	黃峰誠 Huang, Feng-Cheng
論文名稱：	High-Performance SIFT (Scale Invariant Feature Transform) Hardware Design for Efficient Image Feature Extraction 採用 SIFT 演算法之高效能影像特徵點擷取硬體設計
指導教授：	黃錫瑜 Huang, Shi-Yu
口試委員:
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2011
畢業學年度：	99
語文別：	英文
論文頁數：	54
中文關鍵詞：	尺度不變特徵轉換、硬體加速器、即時處理
外文關鍵詞：	Scale-Invariant Feature Transform (or SIFT), hardware accelerator, real-time processing
相關次數：	點閱：3 下載：0
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Feature extraction algorithm is one of the interest classes in Computer Vision techniques in recently years. To extract the robust features, these algorithms require very high computational complexity so that the performance is far from real-time on desktop computers. Scale-Invariant Feature Transform (or SIFT) is one of the state-of-the-art algorithms that currently exist in this domain. In this work, we proposed the first All-Hardware SIFT Accelerator as we know, this hardware design based on TSMC 0.18 um CMOS technology. The proposed architecture consists of two interactive hardware components, one for key point identification, and the other for feature descriptor generation. The usages of segment algorithm and buffer scheme not only provide efficiently data for computing modules, but also reduced about 49.88 % memory requirement than a recent work. With the three-staged pipeline and parallel architecture, the performance of key point identification is about 3.4 milliseconds for one VGA image. Furthermore, including the feature descriptor generation, the total operation time for a VGA image is within 33 milliseconds when the number of features is fewer than about 890.

在電腦視覺(Computer Vision)此技術領域中，特徵點擷取(feature extraction)演算法是近年來備受關注的一項。為了要從影像中擷取出穩定的(robust)特徵點，這些特徵點擷取演算法，大都具有相當大的複雜度。因而，這些演算法在桌上型電腦(desktop computers)執行的時間較長，而難以達成即時的運算(real-time)。在現存的特徵點擷取演算法中，Scale-invariant feature transform (or SIFT)被認為是其中最頂尖的一個演算法。就我們所知道的，在這篇論文裡面，我們提出了第一個全硬體化的SIFT加速器設計，此硬體設計是基於TSMC 0.18 um 之標準單元庫來實現此電路。我們提出的架構由兩個交互運作(interactive)的硬體模組所組成，一個是針對於特徵點辨認(key point identification)，另一個是用於特徵點描述(feature descriptor)的產生。我們所使用的片段演算法(segment algorithm)以及片段暫存策略(segment buffer scheme)，可以有效率的提供輸入資料給予各個硬體模組，並且相較於現存的方法，可以減少大約49.88 %的記憶體使用量。配合三級管線化(three-staged pipeline)以及平行化的架構設計，對於一張VGA大小的影像，其特徵點辨認所需要的時間大概只需要3.4毫秒(milliseconds)。更進一步的，當VGA影像的特徵點數量小於890個，包含特徵點描述的產生在內的總共運算時間可以在33毫秒內完成，而此效能足夠支援影片(video)的及時運算。

Abstract    i
摘要    ii
致謝    iii
Content    iv
List of Figures    vi
List of Tables    viii
Chapter 1 Introduction    1
1.1 Introduction    1
1.2 Thesis Organization    2
Chapter 2 Preliminaries    3
Chapter 3 Target Image Feature Detection Algorithm    8
3.1 Gaussian Pyramid and DoG construction    9
3.2 Key-point Localization and Stability Checking    10
3.3 Gradient Orientation Assignment    11
3.4 Feature Descriptor Generation    13
Chapter 4 Proposed Hardware Architecture    14
4.1 Overall Hardware Architecture    15
4.2 Segment Based Algorithm    17
4.2.1 Basic Segment and Segment Based Task    18
4.2.2 Three-Stages Pipeline    19
4.2.3 Buffering the Temporary Data in Processing Flow    20
4.3 Operation of Sliding Windows and Segment Buffer Scheme    22
4.3.1 Foundation of Window-based Processing    23
4.3.2 Segment Buffer Scheme    24
Chapter 5 Hardware Components    32
5.1 Gaussian Filters and difference-of-Gaussian    32
5.1.1 Parallel difference-of-Gaussian architecture    32
5.1.2 Gaussian Filter Module    33
5.2 Key-point Localization Block    35
5.3 Gradient Magnitude and Orientation    36
5.4 Feature Descriptors Generation    37
5.4.1 Principle Orientation Assignment    38
5.4.2 Descriptor Histogram Computation    39
5.4.3 Normalization    41
Chapter 6 Experimental Results    42
6.1 Reliability    42
6.1.1 Error of Difference-of-Gaussian and Key-point Localization    42
6.1.2 Error of gradients and descriptors    43
6.2 Evaluation of Performance    46
6.3 Used Resource    47
Chapter 7 Conclusion    50
Bibliography    51

                                

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