抽取共同因子或因式是一種邏輯化簡的技術，此技術可以將布林函式表現成一個使用較少變數出現量的等價函式。當在實現電路時，此種較精簡的函式會使用較小的面積。一些布林函式甚至有每個變數只出現一次的等價函式，此為眾所皆知的無扇出布林函式。約翰海斯已經發明了一個辨識無扇出布林函式的演算法。 我們提出了一個性質和一些有效率的方法來加速這個演算法。隨著我們的改進，這演算法的執行時間更能夠與其他最新型的方法競爭。

Factoring is a technique of logic minimization to represent a Boolean function in a equivalent function with minimum literals. When realizing the circuit, a function represented in compact form has minimum area. Some Boolean functions even have equivalent forms which each variable appears exactly once in factored functions, which are known as fanout-free functions. John P. Hayes had devised an algorithm to recognize fanout-free functions. We propose a property and some e±cient ways to accelerate this algorithm.
With our improvements, execution time of this algorithm are more competitive with other state-of-the-art methods.

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