CVD石墨烯因著具有可大面積量產的優點，是將石墨烯應用於半導體工業的必經之路。然而因著無法避免催化金屬蝕刻與轉移製程，使得CVD石墨烯容易外受到外在環境的汙染以至載子傳輸能力受到大幅度的限制。本論文分析石墨烯的載子傳輸散射機制，探討CVD石墨烯主要的載子傳輸散射機制以及電晶體遲滯現象產生的原因，建立了一個適用於分析CVD石墨烯導電特性的載子傳輸模型。

我們也試圖發展一套能有效提升CVD石墨烯載子傳輸能力的電晶體製程：使用分子自組裝法(Self-assembled Process)以HMDS(Hexamethyldisilazane)分子對SiO_2基板進行表面改質，解決SiO_2表面缺陷容易吸附汙染物而對石墨烯造成電荷摻雜與遲滯現象的問題。實驗結果證實，分子自組裝表面改質製程能有效的防止汙染物吸附於SiO_2基板表面，提供石墨烯一個更穩定且潔淨的基板環境，降低石墨烯上的殘存電荷密度。然而HMDS表面改質製程經實驗證實無法抑制CVD石墨烯電晶體的遲滯現象，提升石墨烯電晶體載子傳輸特性必須由改良基板表面特性與改善蝕刻轉移製程的潔淨度同時著手。

CVD graphene is the main way to apply graphene in semiconductor engineering, because of it can be mass production. However, CVD graphene can't avoid the graphene transfer process, it would be polluted very easily and limited the graphene carrier transport properties. The main point of this thesis is to analyze the CVD graphene carrier transport mechanism, find out the carrier transport scattering source and the cause of the transistor hysteresis effect, to build a model fit to analyze the CVD graphene transport.

We also try to create a transistor fabrication method to enhance CVD graphene carrier transport properties, using HMDS(Hexamethyldisilazane) self-assembled process to modify the surface property of SiO2, to solve the problem that SiO2 easily adsorbs impurity, and therefore affecting the graphene transport properties.

According to the experiment result, HMDS surface modification process can effectively prevents impurity adsorbs on to SiO2 surface and provides graphene a more clean substrate environment, reduces the graphene residual carrier concentration. However, this process can't suppresses CVD graphene transistor hysteresis effect. In order to enhance graphene transistor properties, we should modify the substrate surface property and improve the cleanliness of the transfer process at the same time.

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