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研究生: 曾維姿
Wei-Tzi Tseng
論文名稱: 雙核心系統平台上實作基於OpenMAX(TM) DL標準的H.264解碼器
Implementation of H.264 Decoder Based on OpenMAX(TM) DL Standard on Dual-Core SoC Platform
指導教授: 石維寬
Wei-Kuan Shih
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊工程學系
Computer Science
論文出版年: 2008
畢業學年度: 96
語文別: 中文
論文頁數: 38
中文關鍵詞: 雙核心多媒體數位訊號處理器解碼器
外文關鍵詞: dual core, multimedia, PACDSP, OpenMAX, H.264, decoder, DSP
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  • 隨著無線網路的發展與普遍使用,手持行動裝置上提供的多媒體應用程式日益豐富,包含語音、音樂、圖片、影像等,以及利用通訊網路達到更多使用上的互動。如何利用一個有效率的多處理器架構來完成各種處理需求是目前值得討論的議題。對於手持裝置的多核心研究與使用,目前最普遍的為異質雙核心系統,為一個MPU搭配處理複雜運算的DSP,來解決手持裝置的通訊與多媒體應用需求。
    面對不同的處理器或系統架構,在整合多媒體應用程式過程中通常需要重新編寫與設計;為了解決此問題,Khronos組織為多媒體定義了一套規範與APIs,稱為OpenMAX(TM),透過其兩個主要介面,整合層(IL)與發展層(DL),在跨平台多媒體應用程式開發上能更有效率,而不需考慮底層的硬體架構。
    本論文主要將H.264解碼器實作在一個以ARM為MPU,以及由工研院所研發的PACDSP所結合的雙核心系統平台上;遵循OpenMAX(TM) DL的定義,使用PACDSP Assembly語言將H.264解碼器的函式設計為一套函式庫,便於開發者的整合與應用;除了探討OpenMAX(TM)的使用對於程式分配造成的影響,我們將針對單處理器與本雙核心系統的處理效能做分析與比較,最後討論MPU與DSP間溝通的機制,對於此系統實作上所帶來的影響。


    With the growing development and popular exercise of wireless network, multimedia applications provided on mobile devices have increased gradually, including voice, music, image, video, and the interaction by the communication network. It is now an important issue to accomplish a system architecture with multi-processors to deal with different requests from multimedia applications. Today, heterogeneous dual-core architecture has been a popular research and implementation on mobile devices. It refers to a Main Processor Unit(MPU) cooperates with a Digital Signal Processor(DSP), which takes charge in complex numerical computation procedures, to meet the requests of communication and multimedia applications on mobile devices.
    When porting multimedia applications on different platforms, developers usually need to re-design and re-write those codes, which will be time-consuming. To solve this problem, the Khronos Group has defined a set of standards and Application Programming Interfaces (APIs), called OpenMAX(TM), to provide portability for multimedia applications. With two main interfaces: Integration Layer and Development Layer, OpenMAX(TM) APIs enables effective development of media codec implementations, regardless of underlying hardware architecture[4].
    The main research of this thesis is to implement H.264 baseline profile decoder on a Dual-Core platform, combined with an ARM processor as the MPU, and a PACDSP developed in STC of ITRI. We adopt PACDSP Assembly language and follow the definition of OpenMAX(TM) DL to design a set of libraries for developers to easily invoke H.264 decoder functions. Then we discuss the influence of function allocation using OpenMAX(TM) definition, and analysis the efficiency of the H.264 decoder on both Single-Processor and our Dual-Core platform. Finally, we discuss the impact that the communication mechanism between MPU and DSP has brought to the system implementation.

    中文摘要 I ABSTRACT II ACKNOWLEDGEMENTS III INDEX IV FIGURE LIST VI TABLE LIST VII 1. INTRODUCTION 1 1.1. Background 1 1.2. Motivation 2 2. DUAL-CORE SYSTEM AND OPENMAX(TM) INTRODUCTION 3 2.1. Versatile Baseboard for ARM926EJ-S Overview 3 2.1.1. Versatile/PB926EJ-S Baseboard Introduction 3 2.1.2. ARM926EJ-S Development Chip Features 4 2.2. PACDSP OVERVIEW 5 2.2.1. PACDSP Architecture 5 2.2.2. PACDSP Core 6 2.2.3. PACDSP Kernel 7 2.2.4. PACDSP Pipeline 8 2.3. OpenMAX(TM) Overview 9 2.3.1. OpenMAX(TM) Integrate Layer 10 2.3.2. OpenMAX(TM) Development Layer 11 2.3.2.1. API Conventions 11 3. H.264/AVC DECODER FOLLOWED OPENMAX(TM) DL STANDARD 13 3.1. H.264/AVC Codec Overview 13 3.2. Function Partition of H.264/AVC Decoder 14 3.3. H.264 Function Followed OpenMAX(TM) Standard 15 3.3.1. Inverse Transformation and Inverse Quantization(IT/IQ) 16 3.3.2. Predictive Pixel Compensation(PPC) 18 3.3.2.1. Intra Prediction 18 3.3.2.2. Inter Prediction 22 3.3.3. Deblocking Filter(DF) 25 4. SYSTEM DESIGN AND ARCHITECTURE 28 4.1. Micro Kernel on PACDSP 28 4.2. Communication APIs for PACDSP 29 4.3. System and Function Flow 29 4.4. RPC Call Adjustment 31 5. EXPERIMENT RESULT AND STATISTIC ANALYSIS 34 6. CONCLUSION AND FUTURE WORK 37 REFERENCE 38

    [1]STC/M310, “PACDSP v3.0 Software Developer’s Bible – Software Developer’s Guide”, Version 1.0, 2006
    [2]The Khronos Group Inc. “OpenMAX Integration Layer Application Programming Interface Specification”, version 1.1.1, Sep 14th, 2007.
    [3]The Khronos Group Inc. “OpenMAX Development Layer API Specification”, version 1.0.2, Dec 2007.
    [4]Iain E. G. Richardson, “ H.264 and MPEG-4 Video Compression – Video Coding for Next-generation Multimedia”, ISBN 0-470-84837-5, John Wiley & Sons Ltd, 2003.
    [5]Chuan-Hua Chang, I-Tao Liao, “PAC DSP: A Digital Signal Processor for Next-generation Mobile Platform”, Soc Technical Journal 002, May 2005.
    [6]“RealView Platform Baseboard for ARM926EJ-S – User Guide”, ARM, 2008.
    [7]PLLAB, “PAC DSP Micro Kernel User’s Guide”, NTHU.CS, Oct 2006.
    [8]Li-Hao Lin, “Implementation and Optimization H.264 Decoder based on OpenMAX DL for PACDSP”, NTHU.CS, June 2007
    [9]“ARM926EJ-S Development Chip – Reference Manual”, ARM, 2004.
    [10]OpenMAX. URL: http://www.khronos.org/openmax/
    [11]ARM11 MPCore. URL: http://www.arm.com/products/CPUs/ARM11MPCoreMultiprocessor.html
    [12]TI OMAPTM Technology. URL: http://focus.ti.com/general/docs/gencontent.tsp?contentId=36914

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