本文主要致力於研究4H-碳化矽功率場效金氧半電晶體特性的改善，從以下幾個面向著手：導電性能、耐壓能力以及積體化集成的潛力。首先，碳化矽金氧半場效電晶體有著先天的高通道電阻特性，來自於氧化後於二氧化矽與碳化矽介面產生大量的缺陷，為了改善這個問題，我們引入矽離子表面佈植技術。其次，碳化矽功率元件的耐壓能力，受到反向操作時元件邊緣電場集中的影響，無法達到理想耐壓，為了改善元件耐壓能力，我們發展新的邊緣保護技術，並使用在3300伏等級的碳化矽垂直型電晶體上。此外，此種邊緣保護技術可以容忍元件表面正電荷變化的影響，對於伽瑪射線有一定的防護能力，我們也對此做了實驗測試。最後，對了實現碳化矽控制電路與垂直型耐壓電晶體可以積體化於同一個晶片上，我們採用商用碳化矽金氧半電晶體的製程，在不使用多於的光罩與製程下，嘗試製作碳化矽互補式金氧化半電晶體，並研究與垂直型電晶體聯動操作的可能性。
本研究主要達成之成果為:
1. 使用矽離子表面佈植技術，改善碳化矽場效電晶體通道電子遷移率5%，進而提升導通能力，並於可靠度驗證上略優於沒有採用此方法的對照組。
2. 發展反摻雜接面終結延伸的邊緣保護技術，並應用於3300伏等級的碳化矽垂直性電晶體上，達到最高耐壓4100伏(模擬理論值的95%)。
3. 前述反摻雜接面終結延深保護的3300伏等級的碳化矽垂直形電晶體，在伽瑪射線耐受度實驗上，於累積照射劑量700 kGy照射後，仍然可以正常操作，特性遠勝於矽絕緣柵雙極電晶體(IGBT)。
4. 首次展示碳化矽互補式金氧半電晶體與垂直型功率電晶體的積體化，並研究垂直型功率電晶體操作對於邏輯閘反向器的影響。

This thesis is mainly devoted to the research on the improvement of the characteristics of 4H-silicon carbide (SiC) power MOSFETs, starting from the following aspects: conduction performance, blocking capability and the potentiality of integration. First of all, SiC MOSFETs have inherent high channel resistance characteristics, which comes from a large number of defects in the SiO2 and SiC interface after oxidation process. In order to improve this problem, we introduce a Si implanted surface treatment technique. Secondly, the blocking capability of SiC power devices is affected by the crowding of electric field at edge corner of device during reverse bias, and thus the ideal breakdown voltage cannot be achieved. In order to improve the blocking capability of devices, we develop a new edge termination technique and apply it on 3.3 kV class SiC vertical MOSFETs (VDMOS). In addition, this edge termination technique can also provide tolerance of positive charge variation on the surface of the devices, and has a certain degree of protection against gamma rays. We have also made experimental tests to examine on this property. Finally, to realize that the control circuits and the vertical power device can be integrated on the same SiC chip, we use the commercial SiC VDMOS processes without additional masks and processes, trying to make SiC complementary metal-oxide-semiconductor (CMOS) and survey the possibility of interaction with VDMOS.

The main results of this thesis are listed as the following:
1. Applying Si implanted surface treatment technique on SiC MOSFETs to improve their electron mobility and achieving 5% improvement of channel mobility, thereby increasing the conduction capability. Furthermore, among the reliability tests, Si-implanted devices are slightly better than the non-Si implanted group.
2. Developing a new edge termination of counter-doped junction termination extension (CD-JTE), and applying it to the 3.3 kV class SiC VDMOS. The maximum breakdown voltage is 4100 V (95% of the simulated theoretical value).
3. The aforementioned 3.3 kV class SiC VDMOS guarding with CD-JTE can still normally operate after being irradiated with an accumulative radiation dose of 700 kGy in the gamma-ray tolerance test, and is superior to Si insulated gate bipolar transistor (IGBT).
4. Demonstration the integration of SiC CMOS and vertical power device for the first time, and studying the effect on SiC logic gate of inverter as vertical power transistor operation.

[1] K. Shenai, R. S. Scott and B. J. Baliga, "Optimum semiconductors for high-power electronics," in IEEE Transactions on Electron Devices, vol. 36, no. 9, pp. 1811-1823, Sept. 1989, doi: 10.1109/16.34247.
[2] J.B. Casady and R.W. Johnson, "Status of silicon carbide (SiC) as a wide-bandgap semiconductor for high-temperature applications: A review, " in Solid-State Electronics, vol. 39, no. 10, pp. 1409-1422, Oct. 1996, doi: 10.1016/0038-1101(96)00045-7.
[3] H. Matsunami and T. Kimoto, "Step-controlled epitaxial growth of SiC: High quality homoepitaxy," in Materials Science and Engineering: R: Reports, vol. 20, no. 3, pp. 125-166, Aug. 1997, doi: 10.1016/S0927-796X(97)00005-3.
[4] A. K. Agarwal, S. S. Mani, S. Seshadri, J. B. Cassady, P. A. Sanger, C. D. Brandt, and N. Saks, "SiC power devices," in Naval Research Reviews, vol. 51, pp. 13-23, 1999.
[5] C. M. Zetterling et al., "Advantages of SiC," in Process Technology for Silicon Carbide Devices No. 2, Ed., London, United Kingdom: IET, 2002, ch. 1, sec. 2, pp. 3.
[6] A. R. Powell and L. B. Rowland, "SiC materials-progress, status, and potential roadblocks," in Proceedings of the IEEE, vol. 90, no. 6, pp. 942-955, June 2002, doi: 10.1109/JPROC.2002.1021560.
[7] https://ec.kemet.com/wp-content/uploads/sites/4/2019/10/204-FY19-Apps-AC-Power-Wide-Band-Gap-Final-v2.pdf
[8] https://www.pntpower.com/tesla-model-3-powered-by-st-microelectronics-sic-mosfets/
[9] T. Kimoto and J. A. Cooper, "Device processing of silicon carbide," in Fundamentals of silicon carbide technology: growth, characterization, devices and applications, Ed., U.S.A: Wiley-IEEE Press, 2014. ch. 6, sec. 3, pp. 244-249.
[10] N. S. Saks and A. K. Agarwal, "Hall mobility and free electron density at the SiC/SiO2 interface in 4H–SiC," in Applied Physics Letters, vol. 77, no. 20, pp. 3281-3283, Sep. 2000, doi: 10.1063/1.1326046.
[11] S. Harada, R. Kosugi, J. Senzaki, W.-J. Cho, K. Fukuda, and K. Arai, "Relationship between channel mobility and interface state density in SiC metal–oxide–semiconductor field-effect transistor," in Journal of Applied Physics, vol. 91, no. 3, pp. 1568-1571, Oct. 2002, doi: 10.1063/1.1428085.
[12] R. C. De Meo, T. K. Wang, T. P. Chow, D. M. Brown, and L. G. Matus, "Thermal oxidation of SiC in N2O," in Journal of The Electrochemical Society, vol. 141, no. 11, pp. L150-L152, Nov. 1994, doi: 10.1149/1.2059325.
[13] J. P. Xu, P. T. Lai, C. L. Chan, B. Li and Y. C. Cheng, "Improved performance and reliability of N2O-grown oxynitride on 6H-SiC," in IEEE Electron Device Letters, vol. 21, no. 6, pp. 298-300, June 2000, doi: 10.1109/55.843156.
[14] T. Kimoto, Y. Kanzaki, M. Noborio, H. Kawano and H. Matsunami, "Interface properties of metal–oxide–semiconductor structures on 4H-SiC {0001} and (112̅ 0) formed by N2O oxidation," in Japanese Journal of Applied Physics, vol. 44, no. 3, pp. 1213-1218, Mar. 2005, doi: 10.1143/JJAP.44.1213.
[15] Y. Nanen, M. Kato, J. Suda and T. Kimoto, "Effects of nitridation on 4H-SiC MOSFETs fabricated on various crystal faces," in IEEE Transactions on Electron Devices, vol. 60, no. 3, pp. 1260-1262, March 2013, doi: 10.1109/TED.2012.2236333.
[16] H. Shiomi, H. Kitai, M. Tsujimura, Y. Kiuchi, D. Nakata, S. Ono, K. Kojima, K. Fukuda, K. Sakamoto, K. Yamasaki and H. Okumura, "Electrical and physical characterizations of the effects of oxynitridation and wet oxidation at the interface of SiO2/4H-SiC (0001) and (0001̅ )," in Japanese Journal of Applied Physics, vol. 55, no. 4S, pp. 1-6, Mar. 2016, doi: 10.7567/JJAP.55.04ER19.
[17] H. Yoshioka, J. Senzaki, A. Shimozato, Y. Tanaka, and H. Okumura, "Effects of interface state density on 4H-SiC n-channel field-effect mobility," in Applied Physics Letters, vol. 104, no. 083516, pp. 1-4, Feb. 2014, doi: 10.1063/1.4866790.
[18] G. Y. Chung, J. R. Williams, T. Isaacs-Smith, F. Ren, K. McDonald, and L. C. Feldman, " Nitrogen passivation of deposited oxides on n 4H–SiC," in Applied Physics Letters, vol. 81, no. 22, pp. 4266-4268, Nov. 2002, doi: 10.1063/1.1525058.
[19] G. Liu, A. C. Ahyi, Y. Xu, T. Isaacs-Smith, Y. K. Sharma, J. R. Williams, L. C. Feldman and S. Dhar, "Enhanced inversion mobility on 4H-SiC (112̅ 0) using phosphorus and nitrogen interface passivation," in IEEE Electron Device Letters, vol. 34, no. 2, pp. 181-183, Feb. 2013, doi: 10.1109/LED.2012.2233458.
[20] R. Kosugi, T. Umeda, and Y. Sakuma, "Fixed nitrogen atoms in the SiO2/SiC interface region and their direct relationship to interface trap density," in Applied Physics Letters, vol. 99, no. 182111, pp. 1-3, Oct. 2011, doi: 10.1063/1.3659689.
[21] P. Fiorenza, L. K. Swanson, M. Vivona, F. Giannazzo, C. Bongiorno, S. Lorenti, A. Frazzetto and F. Roccaforte, "Characterization of SiO2/SiC interfaces annealed in N2O or POCl3," in Materials Science Forum, vol. 778-780, pp. 623-626, Feb. 2014, doi: 10.4028/www.scientific.net/MSF.778-780.623.
[22] K. Yamamoto, S. Chowdhury and T. P. Chow, " Study of mobility limiting mechanisms in (112̅ 0) 4H-SiC NO annealed MOSFETs," in Materials Science Forum, vol. 821-823, pp. 713-716, Jun. 2015, doi: 10.4028/www.scientific.net/MSF.821-823.713.
[23] J. Rozen, A. C. Ahyi, X. Zhu, J. R. Williams and L. C. Feldman, "Scaling between channel mobility and interface state density in SiC MOSFETs," in IEEE Transactions on Electron Devices, vol. 58, no. 11, pp. 3808-3811, Nov. 2011, doi: 10.1109/TED.2011.2164800.
[24] D. Okamoto, H. Yano, T. Hatayama, and T. Fuyuki, "Removal of near-interface traps at SiO2/4H–SiC (0001) interfaces by phosphorus incorporation," in Applied Physics Letters, vol. 96, no. 203508, pp. 1-3, Apr. 2010, doi: 10.1063/1.3432404.
[25] M. Noguchi, T. Iwamatsu, H. Amishiro, H. Watanabe, K. Kita and N. Miura, "Channel engineering of 4H-SiC MOSFETs using sulphur as a deep level donor," 2018 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, 2018, pp. 8.3.1-8.3.4, doi: 10.1109/IEDM.2018.8614598.
[26] M. Noguchi, T. Iwamatsu, H. Amishiro, H. Watanabe, K. Kita and N. Miura, "Improvement in the Channel Performance and NBTI of SiC-MOSFETs by Oxygen Doping," 2019 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 2019, pp. 20.4.1-20.4.1, doi: 10.1109/IEDM19573.2019.8993479.
[27] C. R. Selvakumar and B. Hecht, "SiGe-channel n-MOSFET by germanium implantation," in IEEE Electron Device Letters, vol. 12, no. 8, pp. 444-446, Aug. 1991, doi: 10.1109/55.119160.
[28] C. R. Selvakumar and G. C. Savvas, "Method for making silicon-germanium devices using germanium implantation," U.S. Patent No. 5,426,069, Jun. 20, 1995.
[29] J.-Y. Jiang, J.-Q. Hung, P.-W. Huang, T.-L. Wu, and C.-F. Huang, "Study on the effects of Si implantation on the interface of 4H-SiC MOSFET," presented at the 2019 51st International Conference on Solid State Devices and Materials, Aichi, Japan, Sep. 2-5, 2019.
[30] P. Moens, J. Franchi, J. Lettens, L. D. Schepper, M. Domeij and F. Allerstam, "A charge-to-breakdown (QBD) approach to SiC gate oxide lifetime extraction and modeling," 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Vienna, Austria, 2020, pp. 78-81, doi: 10.1109/ISPSD46842.2020.9170097.
[31] R. Degraeve, B. Kaczer and G. Groeseneken, "Degradation and breakdown in thin oxide layers: mechanisms, models and reliability prediction", Microelectronics Reliability, vol. 39, no. 10, pp. 1445-1460, Oct. 1999, doi: 10.1016/S0026-2714(99)00051-7.
[32] U. Schwalke, M. Pölzl, T. Sekinger and M. Kerber, "Ultra-thick gate oxides: charge generation and its impact on reliability", Microelectronics Reliability, vol. 41, no. 7, pp. 1445-1460, Jul. 2001, doi: 10.1016/S0026-2714(01)00058-0.
[33] B. J. Baliga, Fundamentals of power semiconductor devices: Springer, pp. 98, 2008.
[34] R. Perez, D. Tournier, A. Perez-Tomas, P. Godignon, N. Mestres and J. Millan, "Planar edge termination design and technology considerations for 1.7-kV 4H-SiC PiN diodes," in IEEE Transactions on Electron Devices, vol. 52, no. 10, pp. 2309-2316, Oct. 2005, doi: 10.1109/TED.2005.856805.
[35] E. A. Imhoff, F. J. Kub, K. D. Hobart, M. G. Ancona, B. L. VanMil, D. K. Gaskill, K.-K. Lew, R. L. Myers-Ward, and C. R. Eddy, Jr., "High-performance smoothly tapered junction termination extensions for high-voltage 4H-SiC devices," in IEEE Transactions on Electron Devices, vol. 58, no. 10, pp. 3395-3400, Oct. 2011, doi: 10.1109/TED.2011.2160948.
[36] W. Sung, E. V. Brunt, B. J. Baliga and A. Q. Huang, "A new edge termination technique for high-voltage devices in 4H-SiC–multiple-floating-zone junction termination extension," in IEEE Electron Device Letters, vol. 32, no. 7, pp. 880-882, July 2011, doi: 10.1109/LED.2011.2144561.
[37] W. Sung, B. J. Baliga and A. Q. Huang, "Area-efficient bevel-edge termination techniques for SiC high-voltage devices," in IEEE Transactions on Electron Devices, vol. 63, no. 4, pp. 1630-1636, April 2016, doi: 10.1109/TED.2016.2532602.
[38] K. Kinoshita, T. Hatakeyama, O. Takikawa, A. Yahata and T. Shinohe, "Guard ring assisted RESURF: a new termination structure providing stable and high breakdown voltage for SiC power devices," Proceedings of the 14th International Symposium on Power Semiconductor Devices and Ics, Sante Fe, NM, USA, 2002, pp. 253-256, doi: 10.1109/ISPSD.2002.1016219.
[39] T. Hiyoshi, T. Hori, J. Suda and T. Kimoto, "Simulation and experimental study on the junction termination structure for high-voltage 4H-SiC PiN diodes," in IEEE Transactions on Electron Devices, vol. 55, no. 8, pp. 1841-1846, Aug. 2008, doi: 10.1109/TED.2008.926643.
[40] H. Niwa, G. Feng, J. Suda and T. Kimoto, "Breakdown characteristics of 15-kV-class 4H-SiC PiN diodes with various junction termination structures," in IEEE Transactions on Electron Devices, vol. 59, no. 10, pp. 2748-2752, Oct. 2012, doi: 10.1109/TED.2012.2210044.
[41] C.-F. Huang, H.-C. Hsu, K.-W. Chu, L.-H. Lee, M.-J. Tsai, K.-Y. Lee and F. Zhao, "Counter-doped JTE, an edge termination for HV SiC devices with increased tolerance to the surface charge," in IEEE Transactions on Electron Devices, vol. 62, no. 2, pp. 354-358, Feb. 2015, doi: 10.1109/TED.2014.2361535.
[42] D. Braunig, D. Fritsch, B. Lehmann and A. L. Barry, "Radiation-induced displacement damage in silicon carbide blue light-emitting diodes," in IEEE Transactions on Nuclear Science, vol. 39, no. 3, pp. 428-430, June 1992, doi: 10.1109/23.277531.
[43] G. B. Roper and R. Lowis, "Devlopement of a radiation hard n-channel power MOSFET," in IEEE Transactions on Nuclear Science, vol. 30, no. 6, pp. 4110-4115, Dec. 1983, doi: 10.1109/TNS.1983.4333091.
[44] P. J. McWhorter and P. S. Winokur, “Simple technique for separating the effects of interface traps and trapped-oxide charge in metal-oxide-semiconductor transistors,” in Applied Physics Letters, vol.48, pp. 133, 1986, doi: 10.1063/1.96974.
[45] D. M. Fleetwood, S. S. Tsao and P. S. Winokur, "Total-dose hardness assurance issues for SOI MOSFETs," in IEEE Transactions on Nuclear Science, vol. 35, no. 6, pp. 1361-1367, Dec. 1988, doi: 10.1109/23.25465.
[46] D. C. Sheridan, Gilyong Chung, S. Clark and J. D. Cressler, "The effects of high-dose gamma irradiation on high-voltage 4H-SiC Schottky diodes and the SiC-SiO2 interface," in IEEE Transactions on Nuclear Science, vol. 48, no. 6, pp. 2229-2232, Dec. 2001, doi: 10.1109/23.983200.
[47] T. Sakai and T. Yachi, "Effects of gamma-ray irradiation on thin-gate-oxide VDMOSFET characteristics," in IEEE Transactions on Electron Devices, vol. 38, no. 6, pp. 1510-1515, June 1991, doi: 10.1109/16.81647.
[48] A. Akturk, J. M. McGarrity, S. Potbhare and N. Goldsman, "Radiation effects in commercial 1200 V 24 A silicon carbide power MOSFETs," in IEEE Transactions on Nuclear Science, vol. 59, no. 6, pp. 3258-3264, Dec. 2012, doi: 10.1109/TNS.2012.2223763.
[49] S. Mitomo, T. Matsuda, K. Murata, T. Yokoseki, T. Makino, A. Takeyama, S. Onoda, T. Ohshima, S. Okubo, Y. Tanaka, M. Kandori, T. Yoshie, and Y. Hijikata, "Optimum structures for gamma-ray radiation resistant SiC-MOSFETs," in Physica Status Solidi A – Applications and Materials Science, vol. 214, no. 4, p. 1600425, Jan. 2017, doi: 10.1002/pssa.201600425.
[50] T. Matsuda, T. Yokoseki, S. Mitomo, K. Murata, T. Makino, H. Abe, A. Takeyama, S. Onoda, Y. Tanaka, M. Kandori, T. Yoshie, Y. Hijikata and T. Ohshima, "Change in characteristics of SiC MOSFETs by gamma-ray irradiation at high temperature," in Materials Science Forum, vol. 858, pp. 860-863, May 2016, doi: 10.4028/www.scientific.net/MSF.858.860.
[51] https://www.infineon.com/cms/en/product/hirel/.
[52] B. Tala-Ighil, A. Oukaour, H. Gualous, B. Boudart, B. Pouderoux, J. -L. Trolet and M. Piccione, "Analysis of commercial punch-through IGBTs behavior under 60Co irradiation: turn-off switching performances evolution," in IEEE Transactions on Nuclear Science, vol. 59, no. 6, pp. 3235-3243, Dec. 2012, doi: 10.1109/TNS.2012.2216289.
[53] A. J. Lelis, D. Habersat, R. Green, A. Ogunniyi, M. Gurfinkel, J. Suehle and N. Goldsman, "Time dependence of bias-stress-induced SiC MOSFET threshold-voltage instability measurements," in IEEE Transactions on Electron Devices, vol. 55, no. 8, pp. 1835-1840, Aug. 2008, doi: 10.1109/TED.2008.926672.
[54] R. Singh and A. R. Hefner, “Reliability of SiC MOS devices,” in Solid-State Electronics, vol. 48, no. 10-11, pp. 1717-1720, Oct.-Nov. 2004, doi: 10.1016/j.sse.2004.05.005.
[55] A. K. Agarwal, S. Seshadri and L. B. Rowland, "Temperature dependence of Fowler-Nordheim current in 6H- and 4H-SiC MOS capacitors," in IEEE Electron Device Letters, vol. 18, no. 12, pp. 592-594, Dec. 1997, doi: 10.1109/55.644081.
[56] M. Gurfinkel, J. C. Horst, J. S. Suehle, J. B. Bernstein, Y. Shapira, K. S. Matocha, G. Dunne and R. A. Beaupre, "Time-dependent dielectric breakdown of 4H-SiC/SiO2 MOS capacitors," in IEEE Transactions on Device and Materials Reliability, vol. 8, no. 4, pp. 635-641, Dec. 2008, doi: 10.1109/TDMR.2008.2001182.
[57] S.-H. Ryu, K. T. Kornegay, J. A. Cooper and M. R. Melloch, "Digital CMOS IC's in 6H-SiC operating on a 5-V power supply," in IEEE Transactions on Electron Devices, vol. 45, no. 1, pp. 45-53, Jan. 1998, doi: 10.1109/16.658810.
[58] Man Pio Lam and K. T. Kornegay, "Recent progress of submicron CMOS using 6H-SiC for smart power applications," in IEEE Transactions on Electron Devices, vol. 46, no. 3, pp. 546-554, March 1999, doi: 10.1109/16.748875.
[59] J. Lee, S. Singh and J. A. Cooper, "Demonstration and characterization of bipolar monolithic integrated circuits in 4H-SiC," in IEEE Transactions on Electron Devices, vol. 55, no. 8, pp. 1946-1953, Aug. 2008, doi: 10.1109/TED.2008.926681.
[60] P. G. Neudeck, D. J. Spry, L.-Y. Chen, G. M. Beheim, R. S. Okojie, C. W. Chang, R. D. Meredith, T. L. Ferrier, L. J. Evans, M. J. Krasowski, and N. F. Prokop, "Stable electrical operation of 6H–SiC JFETs and ICs for thousands of hours at 500 oC," in IEEE Electron Device Letters, vol. 29, no. 5, pp. 456-459, May 2008, doi: 10.1109/LED.2008.919787.
[61] S. Kargarrazi, H. Elahipanah, S. Saggini, D. Senesky and C. Zetterling, "500 oC SiC PWM integrated circuit," in IEEE Transactions on Power Electronics, vol. 34, no. 3, pp. 1997-2001, March 2019, doi: 10.1109/TPEL.2018.2859430.
[62] M. Shakir, S. Hou, B. G. Malm, M. Östling and C. Zetterling, "A 600 °C TTL-based 11-stage ring oscillator in bipolar silicon carbide technology," in IEEE Electron Device Letters, vol. 39, no. 10, pp. 1540-1543, Oct. 2018, doi: 10.1109/LED.2018.2864338.
[63] P. G. Neudeck, D. J. Spry, L. Chen, N. F. Prokop and M. J. Krasowski, "Demonstration of 4H-SiC digital integrated circuits above 800 °C," in IEEE Electron Device Letters, vol. 38, no. 8, pp. 1082-1085, Aug. 2017, doi: 10.1109/LED.2017.2719280.
[64] M. Barlow, S. Ahmed, H. A. Mantooth and A. M. Francis, "An integrated SiC CMOS gate driver," 2016 IEEE Applied Power Electronics Conference and Exposition (APEC), Long Beach, CA, 2016, pp. 1646-1649, doi: 10.1109/APEC.2016.7468087.
[65] B. A. Hull, S.-H. Ryu, H. Fatima, J. Richmond, J. W. Palmour, and J. Scofield, “Development of a 4H-SiC CMOS inverter,” MRS Proceedings, vol. 911, pp. 0911–B13-02, 2006, doi: 10.1557/PROC-0911-B13-02.
[66] M. D. Glover, P. Shepherd, A. M. Francis, M. Mudholkar, H. A. Mantooth, M. N. Ericson, S. S. Frank, C. L. Britton, L. D. Marlino, T. R. McNutt, A. Barkley, B. Whitaker and A. B. Lostetter, "A UVLO circuit in SiC compatible with power MOSFET integration," in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 2, no. 3, pp. 425-433, Sept. 2014, doi: 10.1109/JESTPE.2014.2313119.
[67] T. Hayashi, K. Asano, J. Suda, and T. Kimoto, " Enhancement and control of carrier lifetimes in p-type 4H-SiC epilayers," in Journal of Applied Physics, vol. 112, no. 064503, pp. 1-6, Jul. 2012, doi: 10.1063/1.4748315.
[68] G. Rescher, G. Pobegen, T. Aichinger and T. Grasser, "On the subthreshold drain current sweep hysteresis of 4H-SiC nMOSFETs," 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, 2016, pp. 10.8.1-10.8.4, doi: 10.1109/IEDM.2016.7838392.
[69] M. Meneghini, I. Rossetto, C. D. Santi, F. Rampazzo, A. Tajalli, A. Barbato, M. Ruzzarin, M. Borga, E. Canato, E. Zanoni and G. Meneghesso, "Reliability and failure analysis in power GaN-HEMTs: An overview," 2017 IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, 2017, pp. 3B-2.1-3B-2.8, doi: 10.1109/IRPS.2017.7936282.
[70] D. J. DiMaria, E. Cartier, and D. A. Buchanan, "Anode hole injection and trapping in silicon dioxide", in Journal of Applied Physics, vol. 80, no. 1, pp. 304-317, Jul. 1996, doi: 10.1063/1.362821.
[71] E. Rosenbaum, J. C. King and Chenming Hu, "Accelerated testing of SiO2 reliability," in IEEE Transactions on Electron Devices, vol. 43, no. 1, pp. 70-80, Jan. 1996, doi: 10.1109/16.477595.
[72] W. W. Abadeer, R. -. Vollertsen, R. J. Bolam, D. J. DiMaria and E. Cartier, "Correlation between theory and data for mechanisms leading to dielectric breakdown," Proceedings of 1994 VLSI Technology Symposium, Honolulu, HI, USA, 1994, pp. 43-44, doi: 10.1109/VLSIT.1994.324386.
[73] Y. Nissan-Cohen, J. Shappir and D. Frohman-Bentchkowsky, "Measurement of Fowler-Nordheim tunneling currents in MOS structures under charge trapping conditions", in Solid-State Electronics, vol. 28, no. 7, pp. 717-720, Jul. 1985, doi: 10.1016/0038-1101(85)90022-X.
[74] N. S. Saks, A. K. Agarwal, S-H. Ryu, and J. W. Palmour, "Low-dose aluminum and boron implants in 4H and 6H silicon carbide ", in Journal of Applied Physics, vol. 90, no. 6, pp. 2796-2805, Jun. 2001, doi: 10.1063/1.1392958.
[75] F. Giannazzo, F. Roccaforte, and V. Raineri, "Acceptor, compensation, and mobility profiles in multiple Al implanted 4H-SiC," in Applied Physics Letters, vol. 91, no. 202104, pp. 1-3, Oct. 2007, doi: 10.1063/1.2813022.
[76] M.A. Capano, R. Santhakumar, R. Venugopal,M.R. Melloch, and J.A. Cooper, Jr., "Phosphorus implantation into 4H-silicon carbide," in Journal of Electronic Materials, vol. 29, no. 2, pp. 210–214, Feb. 2000, doi: 10.1007/s11664-000-0144-y.
[77] T. Hatakeyama, J. Nishio, C. Ota and T. Shinohe, "Physical modeling and scaling properties of 4H-SiC power devices," 2005 International Conference On Simulation of Semiconductor Processes and Devices, Tokyo, Japan, 2005, pp. 171-174, doi: 10.1109/SISPAD.2005.201500.
[78] A. O. Konstantinov, Q. Wahab, N. Nordell, and U. Lindefelt, "Ionization rates and critical fields in 4H silicon carbide," in Applied Physics Letters, vol. 71, no. 1, pp. 90-92, May 1997, doi: 10.1063/1.119478.
[79] T. Hatakeyama, "Measurements of impact ionization coefficients of electrons and holes in 4H-SiC and their application to device simulation," in Physica Status Solidi A – Applications and Materials Science, vol. 206, no. 10, p. 2284-2294, Jun. 2009, doi: 10.1002/pssa.200925213.
[80] J. Kim, F. Ren, G. Y. Chung, M. F. MacMillan, A. G. Baca, R. D. Briggs, D. Schoenfeld, and S. J. Pearton, "Comparison of stability of WSiX/SiC and Ni/SiC Schottky rectifiers to high dose gamma-ray irradiation," in Applied Physics Letters, vol. 84, no. 3, pp. 371-373, Jan. 2004, doi: 10.1063/1.1642271.