隨著科技的發展以及人們對行動裝置需求增加，隨著時間的推移，電子產品
變得越來越輕薄、小巧且功能多樣化。因此，電子封裝的目標是朝向微小化發展。
為了維持摩爾定律，在過去幾十年來,電子封裝技術已經經過兩次的革新，第一次
革新是表面黏著技術(Surface Mount Technology, SMT)，取代了插槽式技術(Pin
Through Hole, PTH),第二次革新是球柵陣列封裝(Ball Grid Array, BGA)，取代外
圍接腳封裝，隨著越來越接近摩爾定律的極限，將不同種類的晶片和功能模組結
合成一個封裝的概念促進了第三次革新，稱之為系統型封裝(System in Package,
SiP)，也可稱作 3D 異質整合。到了現今晶圓級封裝(Wafer Level Packaging, WLP)為本研究探討結構。
電子封裝在產品上市前必須通過一系列的封裝結構可靠度測試實驗，其中加
速熱循環測試(Accelerated Thermal Cycling Test,ATCT)為一標準且被廣泛運用的
可靠度測驗，然而熱循環測試要花費大量時間與成本，為了跟上市場需求腳步，
運用有限單元數值分析於可靠度測試，使用ANSYS 模擬軟體得到晶圓級封裝結
構的應力分布及破壞情況，再經由經驗公式獲得封裝結構之壽命。
使用有限單元數值分析建立的模型，由於不同研究者之物理觀念有所差異，
且有許多因素考量點的不同，導致模擬的誤差產生，為了減低誤差並節省建構模
型所花費時間，在目前半導體人才不足的情況下，藉由將模擬以及人工智慧中機
器學習的概念合併，透過已經與實驗驗證過的模型建構訓練資料，將資料引入演
算法內後得到一個穩定且全面的預估機器學習模型。
在機器學習模型中，訓練時間為其一研究方向，而網格搜尋時間極少被探討，
兩者相比之下，網格搜尋時間比訓練時間大了許多，因而在本研究中，將以晶圓
級封裝可靠度為例，使用平行運算探討最佳化參數的搜索，使其可全面應用於不
同機器學習演算法，並利用自訂的經驗公式增進網格搜索法的效率，進而提升封
裝產品的上市時間與競爭力。

With the development of technology and people's increasing demand for mobile devices, electronic products are becoming thinner, smaller, and more multi-functional. The goal of electronic packaging is miniaturization. To maintain Moore's Law, in the past few decades, electronic packaging technology has undergone two innovations. The first innovation is Surface Mount Technology (SMT), which replaced slot technology (Pin Through Hole, PTH). The second innovation is the adoption of Ball Grid Array(BGA) packaging, replacing traditional peripheral lead packages. As we approach the limits of Moore's Law, the concept of integrating different types of chips and functional
modules into a single package has facilitated the third revolution known as System in Package (SiP) or 3D heterogeneous integration. In the present day, Wafer Level Packaging (WLP) is the focus of this study in terms of structure.
Electronic packages must pass a series of package structure reliability testing experiments before products heat the market. Among them, Accelerated Thermal Cycling Test (ATCT) is a standard and widely used reliability test. However, thermal cycling tests cost a lot of time and money. To keep up with market demand, finite element analysis is used for reliability testing. By using ANSYS simulation software,
we can obtain the stress distribution and damage of the wafer-level packaging structure. And then, the life of the packaging structure is obtained through empirical formulas.
We can use finite element analysis to build the model. Since different researchers have different physical concepts and different considerations. This leads to simulation errors. To reduce errors and save the time spent building models. In the case of deficiencies in semiconductor talents, we can combine the concepts of machine learning
in simulation and artificial intelligence, and build training data through models that have been verified with experiments. A stable and comprehensive predictive machine learning model is obtained after the data is introduced into the algorithm.
In machine learning models, training time is one of the research directions, while grid search time is rarely discussed, both of which have a significant impact on the efficiency of machine learning models. In this study, we take WLCSP as a case study and use parallel computing to discuss the search for optimized parameters, which can be fully applied to different machine learning algorithms. Besides, we use custom empirical formulas to improve the efficiency of grid search methods, thereby improving the time-to-market and competitiveness of packaged products.

[1] C. Chang, H. Chang, and K. Chiang, "Study on Gaussian Process Regression to Predict Reliability Life of Wafer Level Packaging with cluster analysis," in 2022 17th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2022: IEEE, pp. 1-4.
[2] H. Chen, B. Chen, and K. Chiang, "Predict the Reliability Life of Wafer Level Packaging using K-Nearest Neighbors algorithm with Cluster Analysis," in 2022 17th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2022: IEEE, pp. 1-5.
[3] C. M. Liu, C. C. Lee, and K. N. Chiang, "Enhancing. the reliability of wafer level packaging by using solder joints layout design," (in English), Ieee Transactions on Components and Packaging Technologies, vol. 29, no. 4, pp. 877-885, Dec 2006, doi: 10.1109/Tcapt.2006.886846.
[4] K. N. Chiang and W. L. Chen, "Electronic packaging reflow shape prediction for the solder mask defined ball grid array," (in English), Journal of Electronic Packaging, vol. 120, no. 2, pp. 175-178, Jun 1998, doi: Doi 10.1115/1.2792616.
[5] C. Tsou, T. Chang, K. Wu, P. Wu, and K. Chiang, "Reliability assessment using modified energy based model for WLCSP solder joints," in 2017 International Conference on Electronics Packaging (ICEP), 2017: IEEE, pp. 7-15.
[6] L. F. Coffin Jr, "A study of the effects of cyclic thermal stresses on a ductile metal," Transactions of the American Society of Mechanical Engineers, New York, vol. 76, pp. 931-950, 1954.
[7] S. S. Manson, Behavior of materials under conditions of thermal stress. National Advisory Committee for Aeronautics, 1953.
[8] R. Darveaux, K. Banerji, A. Mawer, G. Dody, and J. Lau, "Reliability of plastic ball grid array assembly," ed: New York: McGraw-Hill, 1995, pp. 379-442.
[9] R. Darveaux, "Effect of simulation methodology on solder joint crack growth correlation and fatigue life prediction," J. Electron. Packag., vol. 124, no. 3, pp. 147-154, 2002.
[10] P. L. Wu, P. H. Wang, and K. N. Chiang, "Empirical Solutions and Reliability Assessment of Thermal Induced Creep Failure for Wafer Level Packaging," (in English), Ieee Transactions on Device and Materials Reliability, vol. 19, no. 1, pp. 126-132, Mar 2019, doi: 10.1109/Tdmr.2018.2887163.
[11] K. Wu, "Reliability assessment of advanced packaging solder joints under different thermal cycling ramp rates," NTHU, PH. D dissertation, 2016.
[12] W.-R. Jong, H.-C. Tsai, H.-T. Chang, and S.-H. Peng, "The effects of temperature cyclic loading on lead-free solder joints of wafer level chip scale package by Taguchi method," Journal of Electronic Packaging, 2008, doi: https://doi.org/10.1115/1.2837508.
[13] W. S. McCulloch and W. Pitts, "A logical calculus of the ideas immanent in nervous activity," The bulletin of mathematical biophysics, vol. 5, no. 4, pp. 115-133, 1943.
[14] P. Chou, K. Chiang, and S. Y. Liang, "Reliability assessment of wafer level package using artificial neural network regression model," Journal of Mechanics, vol. 35, no. 6, pp. 829-837, 2019.
[15] C. Yuan and C.-C. Lee, "Solder joint reliability risk estimation by AI modeling," in 2020 21st International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2020: IEEE, pp. 1-5.
[16] S. Mangini, F. Tacchino, D. Gerace, D. Bajoni, and C. Macchiavello, "Quantum computing models for artificial neural networks," Europhysics Letters, vol. 134, no. 1, p. 10002, 2021.
[17] A. N. Bhatt and N. Shrivastava, "Application of artificial neural network for internal combustion engines: a state of the art review," Archives of Computational Methods in Engineering, vol. 29, no. 2, pp. 897-919, 2022.
[18] J. R. Quinlan, "Induction of decision trees," Machine learning, vol. 1, no. 1, pp. 81-106, 1986.
[19] T. K. Ho, "Random decision forests," in Proceedings of 3rd international conference on document analysis and recognition, 1995, vol. 1: IEEE, pp. 278-282.
[20] H. Y. Hsiao and K. N. Chiang, "AI-assisted reliability life prediction model for wafer-level packaging using the random forest method," (in English), Journal of Mechanics, vol. 37, pp. 28-36, 2021, doi: 10.1093/jom/ufaa007.
[21] Z. Shu, B. Wang, and K. Chiang, "Using Extra Trees Machine Learning Algorithm to Predict the Asymmetric Warpage Geometry of Panel Level Packaging," in 2022 17th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2022: IEEE, pp. 1-4.
[22] V. K. Gupta, A. Gupta, D. Kumar, and A. Sardana, "Prediction of COVID-19 confirmed, death, and cured cases in India using random forest model," Big Data Mining and Analytics, vol. 4, no. 2, pp. 116-123, 2021.
[23] Y. Chen, W. Zheng, W. Li, and Y. Huang, "Large group activity security risk assessment and risk early warning based on random forest algorithm," Pattern Recognition Letters, vol. 144, pp. 1-5, 2021.
[24] C. Cortes and V. Vapnik, "Support-vector networks," Machine learning, vol. 20, no. 3, pp. 273-297, 1995.
[25] V. Vapnik, S. Golowich, and A. Smola, "Support vector method for function approximation, regression estimation and signal processing," Advances in neural information processing systems, vol. 9, 1996.
[26] A. J. Smola and B. Schölkopf, "A tutorial on support vector regression," Statistics and computing, vol. 14, no. 3, pp. 199-222, 2004.
[27] C. V. M. Y. Q. Practical, "selection of SVM parameters, and noise estimation for SVM regressor," Neural Networks, vol. 17, pp. 113-126, 2004.
[28] S. Bergman and M. Schiffer, "Kernel functions and conformal mapping," Compositio Mathematica, vol. 8, pp. 205-249, 1951.
[29] M. Gönen and E. Alpaydın, "Multiple kernel learning algorithms," The Journal of Machine Learning Research, vol. 12, pp. 2211-2268, 2011.
[30] J. Ma et al., "Metaheuristic-based support vector regression for landslide displacement prediction: A comparative study," Landslides, vol. 19, no. 10, pp. 2489-2511, 2022.
[31] B. Suvarna, B. L. Nandipati, and M. N. Bhat, "Support vector regression for predicting COVID-19 cases," European Journal of Molecular & Clinical Medicine, vol. 7, no. 3, pp. 4882-4893, 2020.
[32] R. K. Dash, T. N. Nguyen, K. Cengiz, and A. Sharma, "Fine-tuned support vector regression model for stock predictions," Neural Computing and Applications, pp. 1-15, 2021.
[33] Q.-H. Su and K.-N. Chiang, "Predicting Wafer-Level Package Reliability Life Using Mixed Supervised and Unsupervised Machine Learning Algorithms," Materials, vol. 15, no. 11, p. 3897, 2022.
[34] S. K. Panigrahy, Y. C. Tseng, B. R. Lai, and K. N. Chiang, "An Overview of AI-Assisted Design-on-Simulation Technology for Reliability Life Prediction of Advanced Packaging," (in English), Materials, vol. 14, no. 18, Sep 2021, doi: ARTN 5342
10.3390/ma14185342.
[35] H. Liao and K. Chiang, "Research on Polynomial Regression Machine Learning Model with K-Means Algorithm for Predicting Advanced Packaging Reliability," in 2022 International Conference on Electronics Packaging (ICEP), 2022: IEEE, pp. 143-144.
[36] H. Chang, B. Chen, and K. Chiang, "The effect of data distribution in Ensemble Learning Algorithms on WLCSP reliability Prediction," in 2021 16th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2021: IEEE, pp. 60-63.
[37] R. Huang, M. Y. Chen, and K. N. Chiang, "Prediction of Fan-Out Level Packaging Warpage using PSO-based Modified Convolutional Neural Network model with Laplacian Filter," (in English), 2021 International Conference on Electronics Packaging (Icep 2021), pp. 101-102, 2021, doi: 10.23919/Icep51988.2021.9451964.
[38] S. K. Panigrahy and K. N. Chiang, "Study on an Artificial Intelligence Based Kernel Ridge Regression Algorithm for Wafer Level Package Reliability Prediction," (in English), Ieee 71st Electronic Components and Technology Conference (Ectc 2021), pp. 1435-1441, 2021, doi: 10.1109/Ectc32696.2021.00229.
[39] S. Y. Fu, Y. C. Tseng, and K. N. Chiang, "Study on Data Effect of Using RNN Model to Predict Reliability Life of Wafer Level Packaging," (in English), 2020 15th International Microsystems, Packaging, Assembly and Circuits Technology Conference (Impact 2020), pp. 200-203, 2020. [Online]. Available: <Go to ISI>://WOS:000646233200042.
[40] B. W. Chen, T. H. Tsai, and K. N. Chiang, "Investigation of data distribution effect in Random Forest Machine Learning Algorithm for WLCSP Reliability Prediction," (in English), 2020 15th International Microsystems, Packaging, Assembly and Circuits Technology Conference (Impact 2020), pp. 196-199, 2020. [Online]. Available: <Go to ISI>://WOS:000646233200041.
[41] H. C. Kuo, B. R. Lai, and K. N. Chiang, "Study on Reliability Assessment of Wafer Level Package Using Design-on-Simulation with Support Vector Regression Techniques," (in English), 2020 15th International Microsystems, Packaging, Assembly and Circuits Technology Conference (Impact 2020), pp. 192-195, 2020. [Online]. Available: <Go to ISI>://WOS:000646233200040.
[42] S. W. Liu, S. K. Panigrahy, and K. N. Chiang, "Prediction of Fan-out Panel Level Warpage using Neural Network Model with Edge Detection Enhancement," (in English), 2020 Ieee 70th Electronic Components and Technology Conference (Ectc 2020), pp. 1626-1631, 2020, doi: 10.1109/Ectc32862.2020.00255.
[43] P. H. Chou, H. Y. Hsiao, and K. N. Chiang, "Failure Life Prediction of Wafer Level Packaging using DoS with AI Technology," (in English), 2019 Ieee 69th Electronic Components and Technology Conference (Ectc), pp. 1515-1520, 2019, doi: 10.1109/Ectc.2019.00233.
[44] Y. C. Lee and K. N. Chiang, "Reliability Assessment of WLCSP using Energy Based Model with Inelastic Strain Energy Density," (in English), 2019 International Conference on Electronics Packaging (Icep 2019), pp. 320-323, 2019. [Online]. Available: <Go to ISI>://WOS:000491362200072.
[45] K.-J. Bathe, Finite element procedures. Klaus-Jurgen Bathe, 2006.
[46] W. N. Findley, J. S. Lai, K. Onaran, and R. Christensen, "Creep and relaxation of nonlinear viscoelastic materials with an introduction to linear viscoelasticity," 1977.
[47] G. E. Dieter and D. J. Bacon, Mechanical metallurgy. McGraw-hill New York, 1976.
[48] M. A. Meyers and K. K. Chawla, Mechanical behavior of materials. Cambridge university press, 2008.
[49] J.-L. Chaboche, "On some modifications of kinematic hardening to improve the description of ratchetting effects," International journal of plasticity, vol. 7, no. 7, pp. 661-678, 1991.
[50] W.-F. Chen and D.-J. Han, Plasticity for structural engineers. J. Ross Publishing, 2007.
[51] L. S. Goldmann, "Geometric optimization of controlled collapse interconnections," IBM Journal of Research and Development, vol. 13, no. 3, pp. 251-265, 1969.
[52] S. M. Heinrich, M. Schaefer, S. A. Schroeder, and P. S. Lee, "Prediction of solder joint geometries in array-type interconnects," 1996.
[53] K. A. Brakke, "Surface evolver manual," Mathematics Department, Susquehanna Univerisity, Selinsgrove, PA, vol. 17870, no. 2.24, p. 20, 1994.
[54] S. S. Manson, "Thermal stress and low-cycle fatigue," 1966.
[55] J. Platt, "Sequential minimal optimization: A fast algorithm for training support vector machines," 1998.
[56] X. Yanjun, W. Liquan, W. Fengshun, X. Weisheng, and L. Hui, "Effect of interface structure on fatigue life under thermal cycle with SAC305 solder joints," in 2013 14th International Conference on Electronic Packaging Technology, 2013: IEEE, pp. 959-964.
[57] M.-C. Hsieh and S.-L. Tzeng, "Solder joint fatigue life prediction in large size and low cost wafer-level chip scale packages," in 2014 15th International Conference on Electronic Packaging Technology, 2014: IEEE, pp. 496-501.
[58] V. Cherkassky and Y. Ma, "Practical selection of SVM parameters and noise estimation for SVM regression," Neural networks, vol. 17, no. 1, pp. 113-126, 2004.