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研究生: 王郁淇
Wang, Yu-Ci
論文名稱: 使用多重密鑰將有限狀態機進行邏輯混淆
Logic Obfuscation of Finite State Machine Using Multiple Keys
指導教授: 黃婷婷
Hwang, Ting-Ting
口試委員: 劉一宇
Liu, Yi-Yu
陳勇志
Chen, Yung-Chih
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊系統與應用研究所
Institute of Information Systems and Applications
論文出版年: 2024
畢業學年度: 112
語文別: 英文
論文頁數: 39
中文關鍵詞: 硬體安全邏輯混淆有限狀態機
外文關鍵詞: Hardware Security, Logic Obfuscation, Finite State Machine
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  • 隨著科技的進步,IC 設計的過程越來越複雜,成本也逐漸提高。為了經濟效益,IC 設計與晶片生產會被分開,導致設計有可能被不信任的第三方竊取,並採取更多非法行為。為了確保晶片的安全,其中一個保護的方法就是邏輯混淆。邏輯混淆可分為針對組合邏輯電路跟針對循序邏輯電路。循序邏輯的邏輯混淆即為加密有限狀態機,其中有兩種方法,分別是基於密鑰的以及無密鑰的。基於密鑰的加密方式是透過增加額外的邏輯閘和密鑰輸入端去保護電路。這種方法會對 IO 查詢攻擊的防護力較弱。而無密鑰的加密方式則是會在原始電路中新增一個混淆區域,需要利用輸入序列去跳脫此區域。此方法對於結構攻擊較為脆弱。

    本篇論文提出一個多密鑰的密鑰式加密方法來增強對於 IO 查詢攻擊的防護力。每個有限狀態機的轉換都會被加密,而正確的密鑰會隨著不同情況而改變。攻擊者除了要知道每個密鑰的正確值,還需要知道每個密鑰的正確使用時機。這樣可以增加許多解密所需的時間。此外,由於整個有限狀態機會被重新合成,結構攻擊也難以攻擊本方法。


    The increasing complexity and cost of integrated circuit (IC) design have led to the separation of chip design and production, exposing circuits to potential illicit activities by untrusted manufacturers. Ensuring the security of circuits is becoming increasingly important. One of the countermeasures against untrusted use is logic obfuscation, which is a common technique to protect circuits by making their functionality difficult to determine. Logic obfuscation can be divided into combinational logic obfuscation and sequential logic obfuscation. Sequential logic obfuscation, which encrypts the finite state machine (FSM), can be key-based or keyless. Key-based methods need additional gates and key inputs to encrypt the circuit, and they are susceptible to I/O query-based attacks like bounded model checking(BMC) attacks. Keyless methods add an obfuscated region to the original circuit and use input sequences to escape from it, but are vulnerable to structural attacks.

    This thesis proposes a multi-key method to enhance key-based obfuscation against I/O query-based attacks. Every transition of the FSM will be encrypted, and the key will continuously change under different conditions. This method requires attackers to know both the correct keys and the correct mappings of keys, significantly increasing the complexity of deciphering the circuit. The FSM will be re-synthesized to further complicate attacks based on structural observations.

    Acknowledgements 摘要 i Abstract ii 1 Introduction 1 2 Previous Work 4 2.1 Defense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Attack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 Preliminary 9 3.1 Attack Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 Problem Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 Encryption Method 14 4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.2 Hardware Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.3.1 Choose Selecting Group Bits . . . . . . . . . . . . . . . . . . . . . . . 20 4.3.2 Encrypt Transitions with Keys . . . . . . . . . . . . . . . . . . . . . . 25 4.3.3 Add Black Hole . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5 Experimental Results 28 5.1 The Security Level of Benchmarks Against BMC Attack . . . . . . . . . . . . 28 5.2 The Influence of State Bits and Selecting Group Bits . . . . . . . . . . . . . . 30 5.3 One Key vs. Multiple Keys . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.4 The Impact of Scores on BMC Attack . . . . . . . . . . . . . . . . . . . . . . 36 6 Conclusions and Future Work 37 References 38

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