研究生: |
林智賢 Lin, Chih-Hsien |
---|---|
論文名稱: |
斜向金屬鍍膜於製作可變線寬奈米壓印模具之研究 Fabrication of Tunable Linewidth Nanoimprint Stamps using Oblique Metal Deposition |
指導教授: |
宋震國
Sung, Cheng-Kuo |
口試委員: |
傅建中
Fu, Chien-Chung 冉曉雯 Zan, Hsiao-Wen |
學位類別: |
碩士 Master |
系所名稱: |
工學院 - 動力機械工程學系 Department of Power Mechanical Engineering |
論文出版年: | 2012 |
畢業學年度: | 100 |
語文別: | 中文 |
論文頁數: | 97 |
中文關鍵詞: | 奈米壓印 、斜向金屬鍍膜 、電漿蝕刻 、壓印工作模具 |
外文關鍵詞: | nanoimprint, oblique deposition, reactive ion etching, working stamp |
相關次數: | 點閱:2 下載:0 |
分享至: |
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
對於奈米壓印技術而言,模具往往是製程的關鍵,但因為光學限制、成本以及時間等因素,加上線寬縮小的要求,現有製作方法已無法滿足精度的需求或成本過高,本文利用現有模具結構之壓印光阻,整合斜向金屬鍍膜與電漿蝕刻,提出模具製作方法,並透過金屬遮罩提供更多的模具材料選擇性。再藉由電漿側蝕效應改變結構線寬與斜向金屬鍍膜改變結構之Duty cycle,得到可變線寬尺寸;透過感應耦合電漿蝕刻將圖案完整地轉移至基板,完成模具的製作。使用SEM分析實驗前後圖案轉移程度與幾何形貌的觀測,依據各實驗參數與實驗結果的關係,得到實驗趨勢或函數關係。
本文利用側蝕效應將週期為144 nm之光阻線寬由57 nm縮減至30 nm,經由兩次斜向金屬鍍膜製作金屬/高分子對稱性結構,取代介電層作為蝕刻遮罩,利用金屬較佳之抗蝕刻性可製作出深寬比皆達3以上的矽結構。對於已完成結構進行電漿修整,在保有足夠深寬比以及不破壞整體結構下增加拔模角,降低因拔模角欠佳的缺陷產生。透過上述實驗結果驗證本製程可製作出可變線寬之奈米結構,並具備快速、低成本與大面積結構之優點。
Conventionally, the master stamp for nanoimprint lithography (NIL) is made of silicon by e-beam lithography when pursuing very high precision, which needs a great amount of time and cost for manufacturing. In addition, diverse applications require variable linewidth and pitches for obtaining demanded performance. This study proposes an efficient method for making working stamps with tunable linewidth or pitch using the identical master stamp.
The pattern of the master stamp was, first, replicated to the imprint resist, underneath which silicon oxide as the release layer was deposited on silicon wafers. Then, resist trimming process was applied to reduce the linewidth of imprinted resist structures from 57 nm to 37 nm by controlling the etching time and double oblique deposition was utilized (by controlling the deposition angle and thickness) for making symmetric aluminum onto the specific region of the resist grating, herein, the top and sidewall regions. The thicknesses of deposited aluminum ranged from 10 nm to 20 nm, which resulted in different linewidth of the grating. Finally, the required duty cycle of the working stamp was formed on the substrate by reactive ion etching using the resist and aluminum as the etching mask, which was followed by immersing the etched substrate in buffered oxide etch solution to remove silicon oxide and the material above. Compared with previous researches, this proposed technique could provide the wide linewidth adjustment range at least 65% of the original one.
In summary, the study can fabricate the working stamp either the identical pattern of the master one, or tunable linewidth or pitches, even though the original one is contaminated after a number of imprints. Instead of using CVD for depositing metallic etching mask that is usually accompanied with high process temperature, this paper employed PVD for providing more adaptability of handling polymeric substrates for the applications of flexible electronics.
[1]International Technology Roadmap for Semiconductors, ITRS.
[2]Stephen Y. Chou, Peter R. Krauss, Preston J. Renstrom, "Imprint of sub-25 nm vias and trenches in polymers", Appl. Phys. Lett., Vol. 67, 3114-3116, 1995.
[3]Hua Tan, Andrew Gilbertson, Stephen Y. Chou, "Roller nanoimprint lithography", J. Vac. Sci. Technol. B, Vol. 16, 3926-3928, 1998.
[4]Jan Haisma, Martin Verheijen, Kees van den Heuvel, "Mold-assisted nanolithography: A process for reliable pattern replication", J. Vac. Sci. Technol. B, Vol. 14, 4124-4128, 1996.
[5]M. Colburn, S. Johnson, M. Stewart, S. Damle, T. Bailey, B. Choi, M. Wedlake, T. Michaelson, S.V. Sreenivasan, J. Ekerdt, C.G. Willson, "Step and Flash Imprint Lithography: A New Approach to High-Resolution Patterning", Emerging Lithographic Technologies, Vol. 3676, 2002-2004, 1999.
[6]Paul Zimmerman, “The immaturity of next generation technologies means that existing techniques need to be extended in order to solve the 32nm and 22nm half-pitch nodes”, SPIE Newsroom, Vol.20, 2009.
[7]D.L. Spears and H.I Smith, Solid state Technology J. 15, 21, 1972.
[8]Amit Kumar, George M. Whitesides, "Features of gold having micrometer to centimeter dimensions can be formed through a combination of stampling with an elastomeric stamp and an alkanethiol "ink" followed by chemical etching", Appl. Phus. Lett., Vol. 63, 2002-2004, 1993.
[9]T. Toyoshima, T. Ishibashi, A. Minamide, K. Sugino, K. Katayama, T. Shoya, I. Arimoto, N. Yasuda, H. Adachi and Y. Matsui, “0.1 um Level Contact Hole Pattern Formation with KrF Lithography by Resolution Enhancement Lithography Assisted by Chemical Shrink (RELACS)”, IEDM Tech. Dig., 333-336, 1998.
[10]J. Sakamoto, T. Nishino, H. Kawata, M. Yasuda, Y. Hirai, “High aspect ratio nano mold fabrication by advanced adge lithography without CVD”, Microelectronic Wngineering 88, 1992-1996, 2011.
[11]J.K. Sheu, Y.K. Su, G.C. Chi, Inductively coupled plasma etching of GaN using Cl2/Ar and Cl2/N2 gases, Journal of Applied Physics, vol. 85, no. 3, 1970-1974, 1999.
[12]龍文安, 積體電路微影製程,高立圖書有限公司, 324, 1998.
[13]龍文安, 半導體奈米技術, 931, 2010.
[14]J. Fricke, B. Yang, O. Brandt, K. Ploog, Pattering of cubic and hexagonal GaN by Cl2/N2 – based reactive ion etching, American Institute of Physics, vol. 74, no. 23, 3471-3743, 1999.
[15]J.P. Booth, G. Cunge, P. Chabert, N. Sadeghi, CFx radical production and loss in a CF4 reactive ion etching plasma: Fluorine rich conditions, American Institute of Physics, vol. 85, no. 6, 3097-3107, 1999.
[16]F.S. Chuang, Y.K. Su, C.C. Chen, J.K. Shu, Reactive ion-beam etching for GaN, 真空科技, 十二卷, 三期, 16-21, 1998.
[17]J. Lee, H. Cho, D.C. Hays, C.R. Abernathy, S.J. Pearton, Dry etching of GaN and related materials: comparison of techniques, IEEE Journal of Selected Topics in Quantum Electronics, vol. 4, no. 3, 557-563, 1998.
[18]Institute of electronics, microelectronics and nanotechnology.
[19]D.J. Griffiths, Introduction to Electrondynamics, 2nd ed., Prentice Hall, 217, 1989.
[20]吳旭晟,利用旋轉塗佈法及熱蒸鍍法製備硫化鎘及摻銅硫化鎘半導體薄膜,國立成功大學碩士論文,台灣,2008.
[21]陳璟文,以熱蒸鍍法製備摻銅硫化鎘/硫化鎘發光二極體元件暨微波加熱製備碲化鎘量子點之研究,國立成功大學碩士論文,台灣,2009.
[22]伍秀菁、汪若文、林美吟 編,真空技術與應用,國家科學研究院儀器科學研究中心,台灣,2001.
[23]賴耿陽,真空蒸鍍應用技術,復漢出版社,台灣,1991.
[24]陳寶清,表面工業雜誌 “真空表面處理工學”,表面工業,台灣,1992.
[25]J. A. Venables and G. L. Price, ed. J. W. Matthews, Nucleation of thin films in Epitaxial Growth, New York, Academic Press, 381 1975 87.
[26]林鴻明、曾世杰,奈米半導體材料之特殊氣體感測性質,工業材料,台灣, 163 2000.
[27]Zhaoning Yu and Stephen Y. Chou, Triangular Profile Imprint Molds in Nanogratimg Fabrication, Nano Letters, Vol. 4, No. 2, 341-344, 2004.