多核系統模擬技巧在近年來被廣泛的研究，我們發現傳統輪詢(polling)和交互(collaborative)同步方法，在目標核心(target core)多於家核心(host core)的狀況下，皆遭遇嚴重的擴充性(scalability)問題。為了解決這個議題，我們提出了一個有效的綜合時間同步技巧(hybrid timing synchronization technique)，它身兼輪詢及交互式的優點。根據我們的實驗結果，該項技巧有效地解決了擴充性議題，並且相較於傳統的方法，提供了良好的模擬速度。

As the multi-core system simulation techniques are being extensively studied in recent years, we find that both the conventional polling and collaborative approaches all encounter a severe scalability issue when the number of target cores is more than that of the host cores. To resolve this issue, we propose an effective hybrid timing synchronization technique which combines the advantage of the polling and the collaborative approaches. According to the experimental results, the proposed technique effectively resolves the scalability issue and shows excellent simulation performance which is one to four orders of improvement against the conventional synchronization approaches.

[1] M.-H. Wu, et al., "Automatic generation of software TLM in multiple abstraction layers for efficient HW/SW co-simulation," presented at the Proceedings of the Conference on Design, Automation and Test in Europe (DATE), Dresden, Germany, 2010.
[2] D. Burger and T. M. Austin, "The SimpleScalar tool set, version 2.0," SIGARCH Comput. Archit. News, vol. 25, pp. 13-25, 1997.
[3] Z. Rongrong, et al., "An Inter-Core Communication Enabled Multi-Core Simulator Based on SimpleScalar," in Advanced Information Networking and Applications Workshops, 2007, AINAW '07., pp. 758-763.
[4] E. Witchel and M. Rosenblum, "Embra: fast and flexible machine simulation," presented at the Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, Philadelphia, Pennsylvania, United States, 1996.
[5] N. Faroughi, "Profiling of parallel processing programs on shared memory multiprocessors using Simics," SIGARCH Comput. Archit. News, vol. 33, pp. 51-56, 2005.
[6] S. S. Mukherjee, et al., "Wisconsin Wind Tunnel II: a fast, portable parallel architecture simulator," Concurrency, IEEE, vol. 8, pp. 12-20, 2000.
[7] Y. Youngmin, et al., "Fast and Accurate Cosimulation of MPSoC Using Trace-Driven Virtual Synchronization," Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 26, pp. 2186-2200, 2007.
[8] W. Meng-Huan, et al., "A high-parallelism distributed scheduling mechanism for multi-core instruction-set simulation," in Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE, 2011, pp. 339-344.
[9] H. Kim, et al., "Scalable and retargetable simulation techniques for multiprocessor systems," presented at the Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis, Grenoble, France, 2009.
[10] J. E. Miller, et al., "Graphite: A distributed parallel simulator for multicores," in High Performance Computer Architecture (HPCA), 2010 IEEE 16th International Symposium on, 2010, pp. 1-12.
[11] M.-H. Wu, et al., "An effective synchronization approach for fast and accurate multi-core instruction-set simulation," presented at the Proceedings of the seventh ACM international conference on Embedded software (EMSOFT), Grenoble, France, 2009.
[12] B. Chopard, et al., "A Conservative Approach to SystemC Parallelization”, Computational Science – ICCS 2006. vol. 3994, V. Alexandrov, et al., Eds., ed: Springer Berlin / Heidelberg, 2006, pp. 653-660.
[13] H. Kai, et al., "Scalably distributed SystemC simulation for embedded applications," in Industrial Embedded Systems, 2008. SIES 2008. International Symposium on, 2008, pp. 271-274.
[14] C. Schumacher, et al., "parSC: synchronous parallel systemc simulation on multi-core host architectures," presented at the Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, Scottsdale, Arizona, USA, 2010.
[15] M. Nanjundappa, et al., "SCGPSim: a fast SystemC simulator on GPUs," presented at the Proceedings of the 2010 Asia and South Pacific Design Automation Conference (ASPDAC), Taipei, Taiwan, 2010.
[16] P. Ezudheen, et al., "Parallelizing SystemC Kernel for Fast Hardware Simulation on SMP Machines," in Principles of Advanced and Distributed Simulation, 2009. PADS '09. ACM/IEEE/SCS 23rd Workshop on, 2009, pp. 80-87.
[17] R. D. Blumofe and C. E. Leiserson, "Scheduling multithreaded computations by work stealing," in Foundations of Computer Science, 1994 Proceedings., 35th Annual Symposium on, 1994, pp. 356-368.
[18] R. D. Blumofe and D. Papadopoulos, "The performance of work stealing in multiprogrammed environments (extended abstract)," presented at the Proceedings of the 1998 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems, Madison, Wisconsin, United States, 1998.
[19] AndeStar™, "ISA, available at www.andestech.com/p2-2.htm, ," 2010.
[20] S. C. Woo, et al., "The SPLASH-2 programs: characterization and methodological considerations," presented at the Proceedings of the 22nd annual international symposium on Computer architecture, S. Margherita Ligure, Italy, 1995.