當浮動式閘極結構之快閃記憶體無法滿足元件微縮的發展時，SONOS-type是取代浮動閘極結構的熱門候選者之一。但是，以氮化矽為電荷儲存層之SONOS快閃記憶體發展到次微米以下時並無法再以降低穿隧氧化層的方式來提高寫入速度，故有很多文獻將以高介電係數材料來取代氮化矽來當作電荷儲存層，但此時面臨到的考驗將會是電荷保持力的持久度。
本實驗將利用不同高介電係數材料以及氮化矽將以堆疊的方式堆疊出電荷儲存層，研究主要是利用不同材料具有不同的特性，配合堆疊式的結構，藉著電荷陷阱密度的多寡、材料結晶溫度的高低、能隙大小的改變、K值影響分壓的不同、陷阱能階的深淺等種種原因，利用能帶工程堆疊出最恰當的電荷儲存層。
由實驗結果得知，不同Hf/Al組成比之HfxAlyO與Si3N4堆疊出的電荷儲存層，會因為Hf:Al比例不同，造成能隙的變化，進而影響操作速度；另外也會因為操作電壓不同，改變主導機制，而呈現不同的寫入/抹除/電荷保持力元件效能。同樣的，不同Hf/Al組成比之HfxAlyO與La2O3堆疊出不同的電荷儲存層，也會受這些情況的影響，此外更探討了退火溫度所帶來的效應。

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