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研究生: 蔡元農
Yuan-Nung Tsai
論文名稱: 40V暫態電壓消除器之設計
The Design of 40V Transient Voltage Suppressor
指導教授: 龔正
J. Gong
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年: 2006
畢業學年度: 94
語文別: 中文
論文頁數: 65
中文關鍵詞: 暫態電壓消除器40電壓
外文關鍵詞: TVS, 40V
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  • 本篇論文所研究的的元件為Transient Voltage Suppressor(TVS),傳統的TVS元件大部分是以單一結構為主要構造,在保護突波上通常只有單層機制,並不能完全符合系統的需求, 所以我們由diode與LDMOSFET結合而成一個新的元件,利用此結構可以達到更好的保護效果。
    本篇論文的設計目標是40V的TVS,主要是利用Medici軟體做diode string的電性模擬,H-spice軟體做電路電性分析和利用Cadence軟體做layout的設計,最後並對實際下線元件作量測分析與討論。


    The device in this thesis is Transient Voltage Suppressor (TVS). Conventional TVS devices are almost made up by single structure. It just have one protection for suppressing surge and always can not totally conform the requirement of system. Therefore, we create a new device by combining diode and LDMOSFET to improve the characteristics.
    The subject for this thesis would be the design of a 40V TVS. We use simulation tools like Medici and H-spice to simulate the electric characteristics of diode string and circuit. We also use Cadence to design layout. Finally, we do measurement and discussion for the final layout device.

    目錄 第一章 前言 1 第二章 元件的概念與原理 3 2.1 TVS的種類 3 2.1.1 SILICON JUNCTION BREAKDOWN SUPPRESSORS 3 2.1.2 火花間隙 4 2.1.3 矽閘流體突波消除器 5 2.1.4 METAL OXIDE VARISTORS 5 2.1.5 FILTERS 7 2.1.6傳統的TVS 8 2.2新的TVS結構 9 第三章 LDMOSFET的發展與操作原理 20 3.1 LDMOSFET的結構 20 3.2 LDMOSFET的發展 21 3.2.1 RESURF結構和原理 21 3.2.1.1 RESURF的發現 22 3.2.1.2 RESURF LDMOSFET 23 3.2.2崩潰電壓的改良 24 3.2.2.1 P型埋藏層結構 24 3.2.2.2 p型內部場環體結構 24 3.2.2.3 SOI結構 25 3.2.3導通電阻的改良 25 3.2.3.1多層阻值之漂移區 25 3.2.3.2聚積式 26 3.2.3.3溝槽式閘極結構 26 3.3崩潰機制 27 第四章 元件的模擬與設計及量測 39 4.1 Diode string的模擬 39 4.2 HSPICE模擬 41 4.3 LAYOUT設計 43 4.4元件的量測與分析 45 第五章 結論 63 參考文獻 64

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