簡易檢索 / 詳目顯示

研究生: 柯冠鴻
Ke, Guan-Hong
論文名稱: 用於藍芽低功耗單路低中頻接收機之類比中頻電路
Analog IF Circuits for a Single-Path Low-IF Bluetooth Low Energy Receiver
指導教授: 黃柏鈞
Huang, Po-Chiun
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 英文
論文頁數: 69
中文關鍵詞: 藍芽低功耗解調器雜訊抑制接收機
相關次數: 點閱:2下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 在本篇研究中,我們設計了一個類比中頻電路應用於一單路徑低中頻的FSK接收機,整個接收機則是適用在藍芽低功耗的通訊系統當中。在此接收機當中,包含了射頻前端電路,可變增益放大器,以及一個FSK解調器。藍芽低功耗無線通訊系統使用了高斯頻率鍵控(GFSK)做為調變方式,比起傳統的藍芽無線通訊,藍芽低功耗降低了系統規格的需求,並希望借此讓整理電路達到更低的功率消耗。利用此一寬鬆的系統規格,我們提出了一個單一路徑架構的低中頻接收機來達到較低的直流功率消耗。其中單一路徑接收機架構是借由在藍芽低功耗的特殊頻譜特性中選擇適當的中頻頻率來達成,在本研究中此一中頻頻率為0.5MHz。

    在射頻前端電路中,我們使用了一個被動組態的低雜訊放大器以及混頻器來提供電壓增益以及完成降頻的功能,並且不需要直流功率的消耗。但是比起傳統的主動式元件,此一方法將會增加後級電路的雜訊表現之需求,為了降低雜訊表現以及直流功率消耗之間的抵換(trade-off),我們在射頻電路後級的可變增益放大器中使用了雜訊抑制的電路技巧,比起傳統以增加直流功率消耗來換取雜訊表現的方式,此一技巧可在功率消耗與雜訊表現中取得更好的平衡。在解調器方面,由於我們所選擇的中頻頻率(0.5MHz)比資料傳輸速率(1MHz)還要低,這將會使得傳統文獻中常用的限幅式(limter-based)解調器無法使用。因此我們提出了一個相位領域的解調器專門為了解決在中頻頻率比資料傳輸率低的情況。此一相位領域解調器在電路實現上採用了三角比率的量化器,將接收到的訊號轉成相位資訊並在相位上做FSK的解調。如此一來即使中頻頻率低於資料傳輸率解調器仍然可以正常動作。這三個電路設計在0.18um的製程之下,操作電壓為1.8V,消耗功率則為1.71毫瓦。


    1 Introduction 1 1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 Specifications of Bluetooth Low Energy 3 2.1 Comparisons between Bluetooth and Bluetooth Low Energy . . . . . . . . . . 3 2.2 Frequency Plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 Modulation Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.4 Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.5 Linearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Receiver Architecture 9 3.1 Heterodyne . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 Direct conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.3 Wideband-IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.4 Low-IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.5 Single Path Low-IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.5.1 Filtering Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4 A Noise Reduction Variable Gain Amplifier 23 4.1 Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.1.1 Resistor Thermal Noise . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.1.2 MOS Channel Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1.3 Gate Induced Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1.4 1/f Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1.5 Power-Noise Tradeoff in Analog Circuits . . . . . . . . . . . . . . . . 25 4.2 Noise Reduction Technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.2.1 A 4-Stage VGA Circuit with Noise Reduction . . . . . . . . . . . . . . 26 4.2.2 Noise Reduction Concept . . . . . . . . . . . . . . . . . . . . . . . . 26 4.2.3 Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.2.4 Bias Resistance Effect . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.2.5 Offset Cancelation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4.3 Circuit Simulation and Measurement . . . . . . . . . . . . . . . . . . . . . . . 36 5 Phase Domain FSK Demodulator 43 5.1 Demodulator Architectures . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 5.1.1 PLL-type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 5.1.2 Differential or Delay Discriminator . . . . . . . . . . . . . . . . . . . 44 5.1.3 Zero-crossing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 5.2 Phase Domain Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 5.2.1 Phase Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 5.2.2 Proposed Phase Conversion Approach . . . . . . . . . . . . . . . . . . 52 5.2.3 Phase Domain Demodulation . . . . . . . . . . . . . . . . . . . . . . 53 5.3 Circuit Simulation and Measurement . . . . . . . . . . . . . . . . . . . . . . . 55 5.3.1 Circuits of the Phase Convertor . . . . . . . . . . . . . . . . . . . . . 55 5.3.2 Behavior Simulation of Demodulator . . . . . . . . . . . . . . . . . . 59 5.3.3 Measurement Results and Layout . . . . . . . . . . . . . . . . . . . . 65 6 Conclusion 68 6.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

    [1] Le controller specification V0.9. Bluetooth SIG, Inc, Mar. 2009.
    [2] A. Abidi, “Direct-conversion radio transceivers for digital communications,” IEEE J.
    Solid-State Circuits, vol. 30, no. 12, pp. 1399–1410, Dec. 1995.
    [3] J. Rudell, J.-J. Ou, T. Cho, G. Chien, F. Brianti, J. Weldon, and P. Gray, “A 1.9-GHz
    wide-band if double conversion cmos receiver for cordless telephone applications,” IEEE
    J. Solid-State Circuits, vol. 32, no. 12, pp. 2071–2088, Dec. 1997.
    [4] J. Crols and M. Steyaert, “Low-IF topologies for high-performance analog front ends of
    fully integrated receivers,” IEEE Trans. Circuits Syst. II, vol. 45, no. 3, pp. 269–282, Mar.
    1998.
    [5] C.-F. Li, S.-C. Chou, and P.-C. Huang, “A noise-suppressed amplifier with a signal-nulled
    feedback for wideband applications,” in IEEE Asian Solid-State Circuits Conf., Nov. 2008,
    pp. 453–456.
    [6] A. V. D. Ziel, Noise in Solid State Devices and Circuits. John Wiley and Sons, 1986.
    [7] C. Enz, “Mos transistor modeling for RF integrated circuit design,” in Proc. Custom Integrated
    Circuits Conference (CICC), May 2000, pp. 189–196.
    [8] E. Vittoz, “Future of analog in the VLSI environment,” in Proc. of the IEEE Int. Symp.
    Circ. and Syst., May 1990, pp. 1372–1375.
    [9] Y. Tsividis, N. Krishnapura, Y. Palaskas, and L. Toth, “Internally varying analog circuits
    minimize power dissipation,” IEEE Circuits and Devices Magazine, vol. 19, no. 1, pp.
    63–72, Jan. 2003.
    [10] A. Papoulis, Probability, Random Variables, and Stochastic Processes. New York:
    McGraw-Hill, 1991.
    [11] J. Rijns, “Cmos low-distortion high-frequency variable-gain amplifier,” IEEE J. Solid-
    State Circuits, vol. 31, no. 7, pp. 1029–1034, July 1996.
    [12] C. Guo and H. Luong, “A 70-MHz 70-dB-gain VGA with automatic continuous-time offset
    cancellation,” in Proceedings of the 43rd IEEE Midwest Symposium on Circuits and
    Systems, Aug. 2000, pp. 306–309.
    [13] K.-H. Huang and C.-K. Wang, “A cost effective binary FSK demodulator for low-IF radios,”
    in Proc. Int. Symp. VLSI Technology, Systems and Applications, 2001, pp. 133–136.
    [14] H. Komurasaki, T. Sano, T. Heima, K. Yamamoto, H.Wakada, I. Yasui, M. Ono, T. Miwa,
    H. Sato, T. Miki, and N. Kato, “A 1.8-V operation RF CMOS transceiver for 2.4-GHzband
    GFSK applications,” IEEE J. Solid-State Circuits, vol. 38, no. 5, pp. 817–825, May.
    2003.
    [15] H. Darabi, S. Khorram, H.-M. Chien, M.-A. Pan, S. Wu, S. Moloudi, J. Leete, J. Rael,
    M. Syed, R. Lee, B. Ibrahim, M. Rofougaran, and A. Rofougaran, “A 2.4-GHz CMOS
    transceiver for Bluetooth,” IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 2016–2024,
    Dec. 2001.
    [16] S. Byun, C.-H. Park, Y. Song, S. Wang, C. Conroy, and B. Kim, “A low-power CMOS
    Bluetooth RF transceiver with a digital offset canceling DLL-based GFSK demodulator,”
    IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1609–1618, Oct. 2003.
    [17] H.-S. Kao, M.-J. Yang, and T.-C. Lee, “A delay-line-based GFSK Demodulator for low-IF
    receivers,” in IEEE Solid-State Circuits Conf. Digest of Technical Papers, Feb. 2007, pp.
    588–589.
    [18] B. Xia, C. Xin, W. Sheng, A. Valero-Lopez, and E. Sanchez-Sinencio, “A GFSK demodulator
    for low-IF Bluetooth receiver,” IEEE J. Solid-State Circuits, vol. 38, no. 8, pp.
    1397–1400, Aug. 2003.
    [19] B. Xia, “Analog-to-digital interface design for wireless receivers,” Ph.D. dissertation,
    Texas A&M University, 2004.
    [20] S. Samadian, R. Hayashi, and A. Abidi, “Demodulators for a zero-IF Bluetooth receiver,”
    IEEE J. Solid-State Circuits, vol. 38, no. 8, pp. 1393–1396, Aug. 2003.
    [21] D. Han and Y. Zheng, “A GFSK demodulator based on instant phase computation and
    adaptive multi-threshold quantization,” in IEEE Asian Solid-State Circuits Conf., Nov.
    2009, pp. 249–252.
    [22] ——, “An ultra low power GFSK demodulator for wireless body area network,” in Proc.
    European Solid-State Circuits Conference (ESSCIRC), Sep. 2008, pp. 434–437.
    [23] F. Eynde, J.-J. Schmit, V. Charlier, R. Alexandre, C. Sturman, K. Coffin, B. Mollekens,
    J. Craninckx, S. Terrijn, A. Monterastelli, S. Beerens, P. Goetschalckx, M. Ingels, D. Joos,
    S. Guncer, and A. Pontioglu, “A fully-integrated single-chip SOC for Bluetooth,” in IEEE
    Solid-State Circuits Conf. Digest of Technical Papers, Feb. 2001, pp. 196–197.
    [24] P. van Zeijl, J.-W. Eikenbroek, P.-P. Vervoort, S. Setty, J. Tangenherg, G. Shipton,
    E. Kooistra, I. Keekstra, D. Belot, K. Visser, E. Bosma, and S. Blaakmeer, “A Bluetooth
    radio in 0.18-¹m CMOS,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1679–1687,
    Dec. 2002.
    [25] A. Ajjikuttira, C. Leung, E.-S. Khoo, M. Choke, R. Singh, T.-H. Teo, B.-C. Gheong, J.-
    H. See, H.-S. Yap, P.-B. Leong, C.-T. Law, M. Itoh, A. Yoshida, Y. Yoshida, A. Tamura,
    and H. Nakamura, “A fully-integrated CMOS RFIC for Bluetooth applications,” in IEEE
    Solid-State Circuits Conf. Digest of Technical Papers, Feb. 2001, pp. 198–199.
    [26] Y.-J. Jung, H. Jeong, E. Song, J. Lee, S.-W. Lee, D. Seo, I. Song, S. Jung, J. Park, D.-K.
    Jeong, S.-I. Chae, andW. Kim, “A 2.4-GHz 0.25-¹m CMOS dual-mode direct-conversion
    transceiver for Bluetooth and 802.11b,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp.
    1185–1190, July 2004.
    [27] D. Weber, W. Si, S. Abdollahi-Alibeik, M. Lee, R. Chang, H. Dogan, S. Luschas, and
    P. Husted, “A single-chip CMOS radio SoC for v2.1 Bluetooth applications,” in IEEE
    Solid-State Circuits Conf. Digest of Technical Papers, Feb. 2008, pp. 364–366.

    無法下載圖示 全文公開日期 本全文未授權公開 (校內網路)
    全文公開日期 本全文未授權公開 (校外網路)
    全文公開日期 本全文未授權公開 (國家圖書館:臺灣博碩士論文系統)
    QR CODE