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研究生： 安 梅
Anumeha Kumari
論文名稱： 以LCLC諧振槽並聯換流器產生電漿可做為表面處理應用
Paralleled Inverters with LCLC Resonant Tanks to Generate Plasma for Possible Surface Treatment Applications
指導教授： 吳財福
Wu, Tsai-Fu
口試委員: 梁從主
Liang, Tsorng-Juu
邱煌仁
Chiu, Huang-Jen
張淵智
Chang, Yuan-Chih
蘇昱丞
Su, Yu-Chen
學位類別： 博士
Doctor
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2024
畢業學年度： 112
語文別： 英文
論文頁數： 114
中文關鍵詞： 諧振迴路 、諧振 、電漿 、諧振迴路 、並聯逆變器 、表面處理 、平均分配
外文關鍵詞： parallel inverter, Resonant tank, equal distribution, LCLC Inverter, Comparision of resonant tanks, Gain plots, Phase shift modulation control, UNIFIED PSM
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    • 中文摘要
    目前，高頻功率換流器被用於在大氣壓下產生等離子體，已被廣泛應用於各種行業、
    家庭及醫療領域，用於表面處理、空氣淨化及對有害細菌的去活化。如果等離子體電源供
    應器設計得當，優點包括低運行成本、高效率及良好的加工效果，並且不會改變材料的性
    質。在工業領域中，等離子體被用於處理各種材料的表面，進行塗層、印刷或黏接。
    本論文開發了一種用於產生等離子體源的電源，用於可能的表面處理應用。所提出的
    系統可以通過高頻率和高輸出電壓實現更好的處理性能，廣泛應用於真空室。高頻諧振換
    流器提供了減少開關損耗的優勢，因為它們允許在電壓或電流為零轉換的點上開啟和關閉
    開關器件。諧振換流器在各種應用中被使用，如焊接、燈具的電子安定器、感應加熱、功
    率因數修正（PFC）、直流交流及直流-直流轉換器。
    本研究設計並實現一個具有高頻率和高輸出電壓的直流-交流諧振換流器。此論文還
    對並聯換流器進行了研究，包括LC（二階）、LCC（三階）和LCLC（四階）諧振槽
    （RTs），以產生可能用於材料表面處理的等離子體源。系統配置包括直流匯流排、全橋
    開關、高頻變壓器、串聯並聯諧振槽及負載。開關頻率為40 kHz，輸出功率通過統一相移
    調制（PSM）控制調節。系統工作頻率高於諧振頻率，以實現零電壓開關（ZVS）並降低
    開關器件的開關損耗。並聯換流器可以實現非常高的功率範圍，這提高電力系統設計的可
    靠性，增加系統效率，減少輸出電流的漣波，但並聯結構的最大挑戰是實現均等的輸出功
    率和電流分佈。換流器系統中存在參數容差，特別是在諧振槽組件中引入了在並聯相間的
    負載分配中產生不平衡。
    為了解決並聯系統中的電流共享問題，需要同時控制輸出幅值和相位的新型調制技術，
    使用統一相移調制（PSM）控制。本論文的新穎之處之一是將敏感性分析應用作為選擇最
    佳諧振槽用於表面處理應用的標準。此方法允許系統地評估組件變化對系統性能的影響，
    為不同諧振槽配置的穩健性和有效性提供寶貴見解。然後，將設計的參數納入模擬結果中，
    考慮±10%的組件容差。這一步驟對於驗證所選諧振槽，在實際條件下的性能以及展示我們
    方法的實際影響至關重要。我們通過LC（二階）和LCC（三階）諧振槽進行比較，超越了
    對LCLC（四階）諧振槽的單一關注。這些比較提供更廣泛的視角豐富了對不同諧振槽配
    置中參數容差的影響。對10 kW 和15 kW 並聯多換流器系統的硬體量測結果進行展示，進
    v
    一步驗證理論分析。該原型的量測效率達到94%，同時符合IEEE-519 的THD 要求，其THD
    為1.52%。
    本論文的原創貢獻包括以下項目：
     一個40 kHz 的並聯換流器系統，搭配不同的諧振槽（RTs），為可能的表面處理應用
    生成等離子體源。
     設計諧振槽確保穩定運行、最小循環電流、減少諧波電流、零電壓開關（ZVS）及零
    電流開關（ZCS），並呈現相同功率共享。
     使用敏感性分析和增益圖來評估組件變化對系統性能的潛在影響。
     通過統一相移調制（PSM）方法實現對4 階諧振槽的組件容差為±10%的情況下實現
    相同輸出電流。這已通過模擬和實驗測試進行驗證。
     本研究還擴展了系統，將三個並聯LCLC 諧振槽換流器納入，同時考慮了±10%的組
    件容差，從而增強系統的多功能性和韌性。
     衍生的控制方法、諧振槽之間的互動方法、濾波器及頻率設計方法,確保效率和輸出
    總諧波失真（THD）性能符合IEEE-519 標準。
    關鍵字：表面處理應用、等離子室、諧振逆變器、諧振回路、靈敏度分析、增益圖、相移
    和相位差控制、等電流分佈、元件容差

    ABSTRACT
    In the present era, high-frequency power inverters are harnessed to generate plasma at
    atmospheric pressure, a technology that has found extensive use in various industries, households,
    and medical fields. The applications range from surface treatment and air purification to the
    deactivation of harmful bacteria. When the plasma power supply is designed with precision, it
    offers a host of advantages, including low operating costs, high efficiency, and excellent processing
    effectiveness, without altering the material properties. In the industrial sector, plasma is a key tool
    for treating surfaces of diverse materials for coating, printing, or adhesion, underscoring the
    practical significance of this research.
    This dissertation presents a novel power supply development aiming to generate plasma
    sources for potential surface treatment applications. The proposed system, with its high frequency
    and high output voltage, offers superior treatment performance, a feature widely utilized in vacuum
    chambers. The use of high-frequency resonant inverters, which minimize switching losses by
    enabling the switching devices to be turned on and off at points where voltage or current is at zero
    transition, is a significant innovation. These inverters find application in a diverse range of fields,
    including welding, electronic ballasts for lamps, induction heating, power factor correction (PFC),
    dc-ac and dc–dc converters.
    This research has designed and implemented a dc-ac resonant inverter with high frequency
    and high output voltage. This dissertation also presents an investigation of paralleled inverters with
    LC (2nd order), LCC (3rd order), and LCLC (4th order) resonant tanks (RTs) to generate plasma
    sources for possible material surface treatment. The system configuration contains a dc bus, fullbridge
    switches, a high-frequency transformer, a series-parallel resonant tank, and a load. The
    switching frequency is 40 kHz, and its output power is regulated by unified phase-shift modulation
    (PSM) control. The system operating frequency is higher than the resonant frequency to achieve
    zero-voltage switching (ZVS) and to reduce switching losses of the switches. Paralleled inverters
    can achieve a very high-power range, which improves the reliability of power system design,
    increases system efficiency, and reduces the ripple of output current, but the biggest challenge with
    paralleled structure is achieving equal output power and current distribution. The presence of
    parameter tolerances in inverter systems, especially in resonant tank components introduces
    imbalances in load sharing among paralleled phases.
    ii
    To address the current sharing problem in parallel systems, where simultaneous control of
    both output amplitude and phase is required, a novel modulation technique known as UNIFIED
    phase shift modulation (PSM) control has been employed. One of the novel aspects of this
    dissertation is the application of sensitivity analysis as a criterion for selecting the best resonant
    tank for surface treatment applications. This method allows the systematic evaluation of
    component variations' impact on system performance, providing valuable insights into the
    robustness and effectiveness of different resonant tank configurations. The designed parameters
    are then incorporated into simulation results, considering a ±10% component tolerance. This step
    is essential to validate the performance of the selected resonant tank under real-world conditions
    and to demonstrate the practical implications of our approach. We go beyond a singular focus on
    the LCLC (4th order) resonant tank by including comparisons with LC (2nd order) and LCC (3rd
    order) resonant tanks. The broader perspective offered by these comparisons enriches the
    understanding of the impact of parameter tolerance in various resonant tank configurations.
    Hardware measurements of 10 kW and 15 kW parallelly connected multi-inverter systems have
    been presented to further verify the theoretical analyses. The measured efficiency of the prototype
    reaches 94% and THD is 1.52% simultaneously compiling with IEEE-519.
    The original contribution of the dissertation includes the following items:
     A 40 kHz parallel inverter system with various resonant tanks (RTs) generates plasma
    sources for possible surface treatment applications.
     Designing the resonant tank ensures stable operation, minimal circulating current,
    reduced harmonic current, ZVS, and ZCS, and identical power sharing is presented.
     Sensitivity analysis and gain plots of resonant tanks have been employed to determine
    the potential impact of component variations on system performance.
     The method of unified phase shift modulation (PSM) achieves identical output current
    despite a ±10% component tolerance for a 4th-order resonant tank. This has been verified
    through simulations and laboratory tests.
     This research also expands the system to incorporate three parallel-level LCLC resonant
    tank inverters while accommodating a ±10% component tolerance; thus, enhancing the
    system's versatility and resilience.
    iii
     Derived control methods, the interaction between resonant tanks, and filter and
    frequency design methods ensure the efficiency and output of total harmonic distortion
    (THD) performance to comply with IEEE-519 standards.
    Keywords: Surface Treatment Applications, Plasma Chamber, Resonant Inverter, Resonant Tank,
    Sensitivity Analysis, Gain-Plot, Phase-Shift & Phase-Difference Control, Equal Current
    Distribution, Component Tolerance

    TABLE OF CONTENTS ABSTRACT ............................................................................................................... i 中文摘要 .................................................................................................................. iv ACKNOWLEDGEMENTS ..................................................................................... vi LIST OF FIGURES ................................................................................................ xii LIST OF TABLES ................................................................................................. xvi CHAPTER 1 INTRODUCTION ............................................................................... 1 1.1 Background ..................................................................................................................... 1 1.1.1 Surface Treatment Application ........................................................................... 1 1.1.2 Introduction to Plasma ........................................................................................ 3 1.1.3 Resonant Inverter Circuits .................................................................................. 5 1.1.4 Switching of Resonant Inverter .......................................................................... 8 1.2 Research Motivation ....................................................................................................... 9 1.3 Dissertation Outline ...................................................................................................... 12 CHAPTER 2 SYSTEM ARCHITECTURE DESIGN, SENSITIVITY ANALYSIS, AND GAIN PLOTS OF RESONANT TANKS ...................................................... 13 2.1 Design the LC (2nd Order) and LCC (3rd Order) Resonant Tank Values ....................... 14 2.2 Determination of All Possible Candidates of the LCLC (4th Order) RT Values ............ 17 2.2.1 Gain Plots of the LCLC-A & LCLC-D Resonant Tanks ................................... 21 2.3 Sensitivity Analysis Comparison of LC, LCC, and LCLC Resonant Tanks .................. 25 2.3.1 Sensitivity Analysis of the LC (2nd Order) Resonant Tank ............................... 25 2.3.2 Sensitivity Analysis of the LCC (3rd Order) Resonant Tank ............................. 26 ix 2.3.3 Sensitivity Analysis of the LCLC (4th Order-D) Resonant Tank ...................... 27 2.4 Determination of LCLC-D′ Resonant Tank ................................................................... 29 2.4.1 Sensitivity Analysis of the LCLC-D′ (4th Order-D′) Resonant Tank ................ 31 2.5 Zero Voltage Switching (ZVS) of LCLC- D′ Resonant Tank ........................................ 33 2.6 Gain Plots Comparison among the 2nd, 3rd, and 4th Order-D′ Resonant Tanks ............. 38 2.7 Summary ....................................................................................................................... 40 CHAPTER 3 CONTROL ALGORITHMS OF RESONANT INVERTERS .......... 42 3.1 Time Domain Analysis of Resonant Inverter ................................................................ 42 3.2 Frequency Domain Analysis of Resonant Inverter ....................................................... 43 3.3 Unified Phase-Shifted Modulation (PSM) Control ....................................................... 44 3.4 Switch Signal Generation .............................................................................................. 46 3.5 Summary ....................................................................................................................... 49 CHAPTER 4 SYSTEM PERIPHERAL AND FIRMWARE OF THE 4th ORDER (LCLC-D′) RESONANT INVERTER ..................................................................... 50 4.1 System Peripheral Circuit of Resonant Inverter ............................................................ 50 4.1.1 Auxiliary Power Supply .................................................................................... 51 4.1.2 Voltage Clamp Protection Circuit ..................................................................... 52 4.1.3 DC Link Voltage Feedback Circuit ................................................................... 53 4.1.4 Peak Detection Circuit ...................................................................................... 54 4.1.5 Output Voltage Feedback Circuit ...................................................................... 55 4.1.6 Output Current Feedback Circuit ...................................................................... 56 4.1.7 Switching Current Feedback Circuit ................................................................ 57 4.1.8 Zero-Crossing Detection Circuit ....................................................................... 57 4.1.9 Overvoltage/Overcurrent Hardware Protection Circuit .................................... 58 4.1.10 Switch Isolation Drive Circuit ........................................................................ 59 x 4.1.11 Optocoupler Isolation Circuit ......................................................................... 61 4.2 Firmware Planning and Control Process ....................................................................... 63 4.2.1 System Firmware Planning ............................................................................... 63 4.2.2 Introduction to Microcontroller RX62T ........................................................... 64 4.3 Master Main Program Process ...................................................................................... 65 4.3.1 Master Analog/Digital Conversion Interrupt Subroutine Process .................... 67 4.3.2 CV/Soft Start Mode .......................................................................................... 69 4.3.3 Load Check Mode ............................................................................................. 69 4.3.4 Phase Difference between Output Voltage and Output Current ....................... 69 4.3.5 Constant Power Control Mode ......................................................................... 69 4.3.6 Master Clock Synchronization Interrupt Subroutine ........................................ 70 4.4 Slave Main Program Process ......................................................................................... 70 4.4.1 Slave Analog/Digital Conversion Interrupt Subroutine Process ...................... 72 4.4.2 Slave Clock Synchronization Interrupt Subroutine .......................................... 72 4.5 Summary ....................................................................................................................... 74 CHAPTER 5 SIMULATION AND EXPERIMENTAL VALIDATIONS OF THE RESONANT INVERTERS ...................................................................................... 75 5.1 System Specifications and Selection of Power Switching Components ....................... 75 5.1.1 Transformer Design and Losses ........................................................................ 78 5.1.2 Resonant Inductor Practical Considerations and Losses .................................. 79 5.1.3 Resonant Capacitor Practical Considerations and Losses ................................ 82 5.2 Simulated Results of the Two Parallelly Connected LC, LCC, and LCLC- D′ Resonant Tanks Inverters .................................................................................................................... 84 5.3 Experimental Results of Parallel Connected LCLC-D′ Resonant Inverter.................... 88 5.3.1 Experimental Results of a Single LCLC-D′ Resonant Inverter ........................ 88 xi 5.3.2 Experimental Results of Two Parallelly Connected LCLC-D′ Resonant Inverters ................................................................................................................................... 91 5.3.3 Simulated Results of Three Parallelly Connected LCLC-D′ Inverters ............. 97 5.3.4 Experimental Results of Three Parallel Connected LCLC-D′ Inverters: .......... 99 5.4 Summary ..................................................................................................................... 103 CHAPTER 6 CONCLUSIONS AND FUTURE RESEARCH .............................105 6.1 Conclusions ................................................................................................................. 105 6.2 Future Researches ....................................................................................................... 106 REFERENCES .......................................................................................................107 VITA ....................................................................................................................... 112 PUBLICATIONS ................................................................................................... 113 A. Journal Papers ................................................................................................ 113 B. Conference Papers ......................................................................................... 113 xii LIST OF FIGURES Fig. 1.1. The atoms under four different states of matter [39]. ....................................................... 3 Fig. 1.2. Breakdown voltage versus pressure length (Paschen Curves) [ 53]. ................................ 4 Fig. 1.3. Simplified block diagram of resonant inverter. ................................................................ 6 Fig. 1.4. Resonant circuits............................................................................................................... 6 Fig. 2.1. LC (2nd Order) Resonant tank configuration. ................................................................. 14 Fig. 2.2. Operating range of parallel LC resonant inverter. .......................................................... 15 Fig. 2.3. The gain curve of parallel LC resonant inverter with quality factor (Q) change. ........... 16 Fig. 2.4. LCC (3rd Order) Resonant tank configurations. .............................................................. 16 Fig. 2.5. Potential candidates of 4th-order resonant tank configurations. ..................................... 17 Fig. 2.6. Simulated results of the possible candidate of LCLC RT. .............................................. 20 Fig. 2.7. Full-bridge LCLC-A resonant inverter. ........................................................................... 21 Fig. 2.8. Equivalent circuit of LCLC-A resonant inverter. ............................................................ 21 Fig. 2.9. Gain plot of the LCLC-A. ............................................................................................... 22 Fig. 2.10. Full-bridge LCLC -D resonant inverter. ....................................................................... 22 Fig. 2.11. Equivalent circuit of LCLC-D resonant inverter. .......................................................... 23 Fig. 2.12. Gain plot of the LCLC-D. ............................................................................................. 24 Fig. 2.13. Sensitivity plots of the 2nd order (LC) resonant tank to L and C. .................................. 26 Fig. 2.14. Sensitivity plots of 3rd order (LCC) resonant tank to L, C1 and C2............................... 27 Fig. 2.15. Sensitivity plots of the 4th-order (LCLC -D) resonant tank to L1, C1 and L2, C2. ........ 28 Fig. 2.16. LCLC-D′ resonant tank architecture. ............................................................................ 29 Fig. 2.17. Flow Chart of LCLC-D′ Parameter Design. ................................................................. 30 Fig. 2.18. Sensitivity plots of the 4th order (LCLC- D′) resonant tank to L1, C1 and L2, C2. ......... 32 Fig. 2.19. MOSFET switching diagram and resonant architecture. .............................................. 33 Fig. 2.20. Input voltage (Vi) waveform. ........................................................................................ 33 Fig. 2.21. LCLC-D′ Full Bridge switch Simulation diagram. ....................................................... 34 Fig. 2.22. The Eight switching states of the upper and lower arm of LCLC-D′ RTS. .................. 38 Fig. 2.23. The gain plot of LC RT with various component tolerances. ....................................... 39 Fig. 2.24. 3rd order RT Gain curve with various component tolerance. ........................................ 39 Fig. 2.25. 4th order D′ RT Gain Curve with various component tolerance. .................................. 40 Fig. 3.1. Schematic diagram of ideal LC resonant inverters. ........................................................ 42 xiii Fig. 3.2. Symmetrical and unified full-bridge phase-shift modulation (PSM). ............................ 45 Fig. 3.3. Schematic diagram of LC resonant inverters. ................................................................. 45 Fig. 3.4. Schematic diagram of (a) unified PSM switching signal (b) VAB waveform. ................. 47 Fig. 3.5. Simulated results of the 4th order switching signal. ........................................................ 49 Fig. 4.1. Schematic diagram of auxiliary power supply. .............................................................. 51 Fig. 4.2. RD-50B converter block diagram [52]. .......................................................................... 51 Fig. 4.3. PDL03-24D15 converter pin diagram. ........................................................................... 52 Fig. 4.4. Voltage clamp protection circuit. .................................................................................... 52 Fig. 4.5. DC link voltage feedback circuit. ................................................................................... 53 Fig. 4.6. LOC110 electrical specifications (normal temperature 25℃) [37]. ............................... 54 Fig. 4.7. Peak detection circuit...................................................................................................... 55 Fig. 4.8. RX62T controller sampling time. ................................................................................... 55 Fig. 4.9. Output voltage feedback circuit. ..................................................................................... 56 Fig. 4.10. Output current feedback circuit. ................................................................................... 56 Fig. 4.11. Switching current feedback circuit. .............................................................................. 57 Fig. 4.12. Output voltage zero-crossing detection circuit. ............................................................ 58 Fig. 4.13. Output current zero-crossing detection circuit. ............................................................ 58 Fig. 4.14. Hardware protection circuit. ......................................................................................... 59 Fig. 4.15. Switch isolation drive circuit. ....................................................................................... 60 Fig. 4.16. TLP358 internal circuit and pin diagram [51]. ............................................................. 61 Fig. 4.17. Optocoupler isolation circuit. ....................................................................................... 62 Fig. 4.18. Sharp PC410. ................................................................................................................ 62 Fig. 4.19. The relationship between output and input of Sharp PC410. ....................................... 63 Fig. 4.20. RX62T 112-pin LQFP pin diagram. ............................................................................. 64 Fig. 4.21. Master main program flow chart. ................................................................................. 66 Fig. 4.22. Master A/D conversion interrupts subroutine flow chart. ............................................ 68 Fig. 4.23. Slave main program flow chart. ................................................................................... 71 Fig. 4.24. Slave A/D conversion interrupts subroutine flow chart. ............................................... 73 Fig. 5.1. Switch current resistance change diagram [46]. ............................................................. 77 Fig. 5.2. Iron core saturation curve [54]. ...................................................................................... 78 Fig. 5.3. The volume loss diagram corresponding to the iron core operating frequency [48] ...... 79 xiv Fig. 5.4. Schematic diagram of 4th order practical connection method of inductor. ..................... 79 Fig. 5.5. Schematic diagram of film capacitor. ............................................................................. 82 Fig. 5.6. Frequency corresponds to AC voltage of film capacitor. ............................................... 82 Fig. 5.7. Volume, current resistance, and voltage resistance of each capacitance value............... 83 Fig. 5.8. Schematic Configuration of Parallel Resonant Inverters. .............................................. 84 Fig. 5.9. Simulated results of two LC parallel resonant inverters: (a) without and (b) with the controls. (± 5 % component tolerance) ......................................................................................... 85 Fig. 5.10. Simulated results of two LCC parallel resonant inverters: (a) without and (b) with the controls. (± 5 % component tolerance) ......................................................................................... 86 Fig. 5.11. Simulated results of two LCLC-D′ parallel resonant inverters:(a) without and (b) with the controls. (± 5 % component tolerance). .................................................................................. 87 Fig. 5.13. Master LCLC-D′ resonant inverter circuit diagram. ..................................................... 88 Fig. 5.14. 5 kW constant power output diagram (41.957+j5.763 ohm). ....................................... 89 Fig. 5.15. Low impedance zero voltage switching (ZVS) waveform (41.957+j5.763 ohm). ....... 89 Fig. 5.16. 5 kW constant power output diagram (81.677+j5.915 ohm) ........................................ 90 Fig. 5.17. High impedance zero voltage switching (ZVS) waveform (81.677+j5.915 ohm). ...... 90 Fig. 5.18. Circuit diagram of two parallel connected LCLC-D′ resonant converters. .................. 91 Fig. 5.19. 2 kW constant power output diagram (26 ohm). .......................................................... 92 Fig. 5.20. 4 kW constant power output diagram (26 ohm). .......................................................... 92 Fig. 5.21. 6 kW constant power output diagram (26 ohm). .......................................................... 93 Fig. 5.22. 8 kW constant power output diagram (26 ohm). .......................................................... 93 Fig. 5.23. 10 kW constant power output diagram (26 ohm). ........................................................ 94 Fig. 5.24. 2 kW constant power output diagram (41.3+j10.4333 ohm). ....................................... 94 Fig. 5.25. 4 kW constant power output diagram (41.3+j10.4333 ohm) ........................................ 95 Fig. 5.26. 6 kW constant power output diagram (41.3+j10.4333 ohm) ........................................ 95 Fig. 5.27. 8 kW constant power output diagram (41.3+j10.4333 ohm) ........................................ 96 Fig. 5.28. 10 kW constant power output diagram (41.3+j10.4333 ohm) ...................................... 96 Fig. 5.12. Simulated results of three LCLC -D′ parallel resonant inverters: (a) without and (b) with the controls. ................................................................................................................................... 98 Fig. 5.29. Measured waveforms at 5 kW of (a) output voltage VO, the input-side inductor current Ii, gate signal VGS, drain-source voltage VDS, and (b) their zoom-in waveforms. ....................... 100 xv Fig. 5.30. Measured voltage and current waveforms from the inverter operated at 2 kW (a) without, and (b) with the controls. ............................................................................................................ 101 Figure 5.31. Measured voltage and current waveforms from the inverter operated at 10 kW (a)without, and (b) with the controls. .......................................................................................... 102 Fig. 5.32. Measured voltage and current waveforms from the 3 parallel-connected inverters operated at 15 kW (a) without and (b) with the controls. ........................................................... 103 Fig. 5.33. Photograph of three paralleled inverters with LCLC- D′ RTs prototype. ................... 103 xvi LIST OF TABLES Table 2.1 System Output Specification ......................................................................................... 13 Table 2.2. Parameter of Possible LCLC Resonant Tanks. ............................................................. 18 Table 2.3. Sensitivity to Inductors and Capacitors ....................................................................... 32 Table 5.1. System Specifications and Component Values of LC, LCC, and LCLC-D′. ................ 76 Table 5.2. Characteristics of each material. .................................................................................. 80 Table 5.3. THD Analysis Results .................................................................................................. 97 Table 5.4. Component Value Difference of The Three Inverters (LCLC- D′). ............................. 97

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