在晶片開發的過程中，開發者經常會使用模擬器來驗證晶片的設計以及模擬晶片實際運行的效能狀況。當開發者希望針對晶片上的某些元件進行模擬時，軌跡驅動模擬經常被使用對特定的元件，例如快取記憶體或是晶片網路。其方法為透過收集程式執行的軌跡為輸入，模擬特定元件的執行狀況，相較於在模擬器上實際模擬程式執行，軌跡驅動模擬可以進行更快速的模擬。而在模擬過程中，相較於模擬完整的程式軌跡，開發者會對程式中的特定部分較有興趣，稱之為興趣區間。一般用來進行模擬的程式軌跡只包含執行之指令或是讀取的記憶體位置，在沒有額外特定標注的狀況下，開發者很難從程式軌跡中擷取出和興趣區間相關的部分。
本篇論文提出了一個方法，延伸過去的研究，將程式軌跡轉換成有限狀態機的形式，並在其上對每一個狀態給予權重。將程式指令軌跡轉換成加權圖，並從中找出權重較重的子圖，即為和開發者的興趣區間相關之部分，並從軌跡中將其擷取。最後將此方法實作於晶片網路之軌跡驅動模擬，驗證此方法的可行性，並示範透過興趣區間擷取可以進行更有效並快速之軌跡驅動模擬。實驗結果顯示，本方法與實際額外對興趣區間函式標注進行擷取所得之軌跡相比，晶片網路模擬之網路延遲數值的誤差為2.55%，顯示本方法之可行性。

In electronic system-level(ESL) design for computer systems, trace-driven simulation is normally used to simulate specific components of a computer system, e.g. cache or network-on-chip(NoC), in order to verify their designs and evaluate the resultant performance. While traces are often collected by third parties without knowing how they will be used later, ESL designers are more interested in specific portions of the trace, e.g. the main loop of the original program or a particular phase of the computation, which are referred to as the region-of-interest(ROI). The challenge is thus to extract the ROI for a specific design from a trace that was collected without knowing and hence properly annotating the desired ROI. In this thesis, we take on this challenge and consider extraction of ROI from instruction traces resulting from the executions of some (benchmark) programs. To solve this problem, we propose to first infer from the trace the high-level structure of the program by reducing the trace into a finite-state machine (FSM), called the trace-derived FSM(TD-FSM). Next, the ROI is extracted by selecting appropriate subgraphs from the TD-FSM. Finally, a replay procedure is used to generate a trace that is very similar to the original trace but contains only the ROI. To demonstrate the effectiveness of the proposed methodology, we show how the trace corresponding to the main loop of a program can be extracted to drive trace-driven NoC simulation. The simulation results are compared with those using the traces obtained from instrumentation on the original program source code. The comparisons show that the simulation results using our methodology and the annotated traces are differed by only 2.55% in average. The work presented in this thesis is only a starting point and the encouraging results are subject to certain restrictions, which will be discussed in detail.

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