應用矽化鍺通道與低跨越能障穿隧介電層於快閃記憶體的模擬研究

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研究生：	王啟照 Chi-Chao Wang
論文名稱：	應用矽化鍺通道與低跨越能障穿隧介電層於快閃記憶體的模擬研究 Simulation of Flash Devices with SiGe Channel and Low-Barrier Tunnel Dielectrics
指導教授：	張廖貴術 Kuei-Shu Chang-Liao
口試委員:
學位類別：	碩士 Master
系所名稱：	原子科學院 - 工程與系統科學系 Department of Engineering and System Science
論文出版年：	2006
畢業學年度：	94
語文別：	中文
論文頁數：	109
中文關鍵詞：	BBHE 、P通道快閃記憶體、矽化鍺、低跨越能障介電層、純鍺、二氧化鉿
相關次數：	點閱：4 下載：0
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在本論文中，除了介紹基本快閃記憶體的操作原理，也將利用模擬的方法，進一步改善快閃記憶體的操作性能，主要可分成二大部分。
第一部份：主要針對矽化鍺於基底的應用，首度提出以矽化鍺為P通道快閃記憶體的表面通道，以提高帶對帶穿隧引發熱電子注入(Band-to-band tunneling-induced hot carrier injection, BBHE)的速度，並於模擬結果發現，當鍺含量達80％時，其BBHE的寫入速度可在相同操作偏壓下，被提高超過1000倍；另外為了改善矽化鍺與二氧化矽之間的不良介面特性，單晶矽層(Si-cap layer)被引入於矽化鍺與二氧化矽之間，但單晶矽層的引入卻造成，原本利用矽化鍺提高的BBHE寫入速度下降。
第二部分：將一些低跨越能障的材料，如二氧化鉿，一起應用於矽化鍺通道的P型快閃記憶體上，並討論其工作特性，由模擬結果發現，矽化鍺通道與低跨越能障的結合，比個別利用低跨越能障或矽化鍺通道改善BBHE的寫入速度，都來的快。

第一章  緒論
1 前言………………………………………………………………1
2 論文介紹…………………………………………………………2
第二章  快閃記憶體基礎理論介紹與模擬軟體介紹
1 快閃記憶體基本操作原理………………………………………4
1.1 快閃記憶體結構 （Flash Structure）……………………4
1.2 快閃記憶體基本操作…………………………………………4
2 論文回顧…………………………………………………………10
2.1 SONOS…………………………………………………………10
2.2 雙位元快閃記憶體(2-Bit)…………………………………11
2.3 低跨越能障介電層應用（Lower Barrier Dielectric）…12
2.4堆疊穿隧氧化層(Stack tunneling dielectric)…………12
2.5掩埋矽化鍺通道提高CHISEL注入速度…………………………12
2.6 U型浮動閘極快閃記憶體……………………………………13
3 快閃記憶體種類…………………………………………………14
4  MEDICI 模擬軟體介紹…………………………………………15
第三章  利用矽化鍺與鍺改善P通道快閃記憶體工作效能
1    P通道快閃記憶體元件結構與原理………………………29
1.1    P通道快閃記憶體結構……………………………………30
1.2    帶對帶穿隧引發熱載子寫入(BBHE)………………………30
1.3    通道FN抹除…………………………………………………31
1.4    讀取…………………………………………………………31
2    矽化鍺應用於P型快閃記憶體的表面通道………………32
2.1    模擬元件參數以及模擬物理模型…………………………33
2.2    BBHE寫入……………………………………………………34
2.3    抹除現象……………………………………………………37
3    矽化鍺應用於P型快閃記憶體的掩埋通道………………37
3.1 BBHE寫入……………………………………………………37
3.2抹除現象………………………………………………………39
3.3干擾(Disturbance) …………………………………………40
4    矽化鍺與純鍺應用於快閃記憶體結論…………………41
第四章 不同跨越能障介電層與矽化鍺通道快閃記憶體探討
1  高介電係數介電層在快閃記憶體的應用……………………60
2  不同電子跨越能障介電層之快閃記憶體效能模擬…………61
2.1  高介電係數介電層參數設定………………………………62
2.2  N通道快閃記憶體特性模擬…………………………………63
2.3  P通道快閃記憶體特性模擬（BBHE）……………………64
3  矽化鍺通道快閃記憶體與二氧化鉿(HfO2)介電層模擬……65
3.1  N型矽化鍺通道與HfO2穿隧介電層快閃記憶體模擬……66
3.2  P型矽化鍺通道與HfO2穿隧介電層快閃記憶體模擬……70
4  干擾特性………………………………………………………72
5  本章結論………………………………………………………74
第五章  結論與未來建議………………………………………102
參考文獻…………………………………………………………105

                                

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