隨著深度學習的成功，許多神經網路架構被提出且被廣泛使用於不同領域的應用。如何布置複雜的神經網路架構於資源受限的裝置中是一個受關注的議題。在硬體架構上，針對功耗做優化的技巧十分重要。然而，有些針對功耗做優化的技巧可能會增加錯誤發生的機會，例如：電壓調整、多種臨界電壓等等。錯誤會因為訊號傳遞較慢而產生，雖然神經網路被認為他們可能對錯誤有一些容忍性，過多的錯誤還是可能是神經網路的功能性受影響。因此，我們提出方法來處理因訊號傳遞較慢而產生的錯誤。較慢的訊號傳遞會使得電路路徑的延遲較長且某些特定的電路輸入會叫容易出錯。基於以上原因，我們挑選出那些容易出錯的輸入或是組合並藉由調整神經網路中的權重以及對它的架構做修改來避免那些輸入出現於神經網路的運行階段。我們的方法是藉由軟體端的調整來避免錯誤，所以不需要重新設計電路的架構。實驗結果顯示我們的方法可以明顯地改善錯誤環境下的神經網路準確率，最顯著的準確度增加甚至達到27%，此外一系列的實驗也顯示我們的方法可以應用於不同的神經網路架構且都有明顯的改善。

With the success of deep learning, many neural network models have been proposed and used in different application domains. In some applications, the edge devices to implement the complicated models are power-limited and optimization techniques are often applied for reducing power consumption. However, some power optimization techniques, such as voltage scaling and multiple threshold voltages, may increase the probability of error occurrence due to slow signal propagation. Although neural network models are considered to have some tolerance to errors, the prediction accuracy could be significantly affected when there are a large number of errors. Thus, we propose methods to mitigate the errors caused by slow signal propagation, which leads to longer path delay in a circuit and fails some input patterns. We consider the patterns significantly affected by slow signal propagation and prevent them from failure by adjusting the given neural networks and its parameters. Since our methods modify the neural network on the software side, we do not need to re-design the hardware structure. The experimental results demonstrate the effectiveness of our methods in different network models.
Additionally, we can improve the accuracy by up to 27%.

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