ARMvisor 之記憶體虛擬化設計｜國立清華大學博碩士論文庫

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研究生：	黎士瑋 Li, Shih-Wei
論文名稱：	ARMvisor 之記憶體虛擬化設計 Memory Virtualization for ARMvisor
指導教授：	鍾葉青 Chung, Yeh-Ching
口試委員:	鍾葉青 Chung, Yeh-Ching 李哲榮 Lee, Che-Rung 劉廣治 Liu, Kuang-Chih
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 資訊工程學系 Computer Science
論文出版年：	2012
畢業學年度：	100
語文別：	英文
論文頁數：	46
中文關鍵詞：	虛擬化、作業系統、計算機架構
外文關鍵詞：	Virtualization, Operating System, Computer Architecture
相關次數：	點閱：2 下載：0
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由於雲端運算的蓬勃發展，虛擬化技術在近期成為一個炙手可熱的研究議題。除了伺服器端的虛擬化應用，近來許多人將焦點放了在於對嵌入式裝置的虛擬化以提升系統安全，穩定性以及支援多元作業系統的執行。為了對嵌入式虛擬化有更深入的研究，我們以KVM為基礎開發出ARMvisor這個hypervisor來虛擬化ARMv6的處理器平台。事實上，為了要正確的達成虛擬機器端記憶體地址的轉換和對虛擬機器和hypervisor的隔離，記憶體虛擬化的設計通常在hypervisor中是最為複雜的。本論文將對ARMvisor的中我們記憶體虛擬化針對ARMv6 MMU的不同設計作深入的探討。我們使用shadow page table將客戶端的虛擬地址轉換成宿主端的實體記憶體地址。而為了有效率的讓客戶端虛擬機器在宿主端的user mode執行以達成對宿主端的保護，我們善加利用了ARM MMU所提供的domain這項功能。除此之外，我們提出了paravirtualization的技巧包括PT modification hypercalls 和 ASID re-mapping來提升系統效能。最後我們利用了數據說明這些效能優化技巧對客戶端虛擬機器的影響。

Virtualization technology has been a hot topic in recent years due to the prevalence of cloud computing. However, many have shifted their focus from server side virtualization to embedded virtualization to enhance security and boost system reliability, increase software portability and support execution of heterogeneous OSs. We have implemented ARMvisor, a KVM based hypervisor that is capable of virtualizing ARMv6 architecture. Memory virtualization is known to be the most complicated part in the design of a hypervisor. The correctness of in-directed memory translation in guest virtual machines must be ensured while isolating virtualization machines from accessing the hypervisor. In this thesis, we will cover several design strategies we have adopted for memory virtualization in ARMvisor for ARMv6 MMU. We use shadow page tables to translate guest virtual address to host physical address. ARM’s domain is used to efficiently transform and de-privilege guest VMs in user mode. We further propose paravirtualization techniques including PT modification hypercalls and ASID re-mapping to optimize the performance. The evaluation of benchmarks in both LMBench and MiBench will be demonstrated in the thesis.

Abstract ii
List of Contents .......................................................................................................... iii
List of Figures ............................................................................................................... v
List of Tables ................................................................................................................ vi Chapter 1 Introduction............................................................................................. 1
Chapter 2 Related Work .......................................................................................... 4
Chapter 3 System Architecture ................................................................................ 7
3.1 KVM Overview ......................................................................................... 7
3.1.1 Hardware Extension on KVM-x86 ................................................ 8
3.2 ARMvisor Software Model........................................................................ 9
3.2.1 CPU Virtualization ......................................................................... 9
3.2.2 Memory Virtualization ................................................................. 12
3.2.3 IO Virtualization .......................................................................... 13
Chapter 4 ARMv6 Memory Virtualization .......................................................... 14
4.1 ARMv6 MMU feature ............................................................................. 14
4.2 Virtualizing ARMv6 MMU...................................................................... 16
4.2.1 Guest Physical Memory Allocation ............................................. 16
4.2.2 Vector Page .................................................................................. 18
4.2.3 Shadow Paging............................................................................. 19
Chapter 5 Optimization .......................................................................................... 27
5.1 Hyper-call for PT modification ................................................................ 27
5.2 Cache and TLB management ................................................................... 29
5.2.1 Cache Management ...................................................................... 29
5.2.2 TLB Management and ASID remapping ..................................... 29
iv
Chapter 6 Evaluation .............................................................................................. 32
6.1 LMBench ................................................................................................. 33
6.2 MIBench .................................................................................................. 37
Chapter 7 Conclusion ............................................................................................. 40
Reference …………………………………………………………………………42
Appendix Hardware Extension for ARM Memory Virtualization .................... 45
                                

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