暫態電壓抑制器(TVS)主要應用在防護過度電壓應力(EOS)與靜電放電(ESD)對積體電路的破壞。針對先進VLSI電路的保護，其主要發展趨勢在尋求低電壓與低電容的TVS元件，達成有效的保護及符合資料傳輸的需求。本論文提出橫向連結之背對背二極體的結構，達到TVS元件低電容與低崩潰電壓的需求，可整合於先進積體電路或應用於獨立的TVS元件中。根據電容、直流I-V及暫態TLP I-V特性量測結果，此側向背對背二極體的確可以符合低電容低電壓暫態電壓抑器的應用。同時在此研究中，我們藉由TLP測試後的元件，運用紅外線阻值偵測儀(IR-OBIRCH)及微光顯微鏡(EMMI)等分析技術，可以清楚的了解元件損壞區域位置，可幫助崩潰機制的分析極進行元件結構之最佳化設計。

One of the developmental trends for Transient Voltage Suppressor (TVS), the off-chip electrical-overstress (EOS) and electrostatic discharge (ESD) protection device, is to seek low-voltage and low capacitance solution for advance integrated circuit applications. In this paper, on the back-to-back diode-based TVS is proposed to provide both low capacitance and low breakdown voltage, which can be integrated with advance IC process or further optimized for discrete TVS device. The capacitance level, TLP I-V characteristic, DC I-V characteristic are investigated in this work, where it is shown that the proposed device can be promising candidate for low capacitance TVS applications. After the TLP test, the broken TVS diodes are inspected by IR-OBIRCH and EMMI for the identification of failure points. These data not only help further understanding of the breakdown mechanism in these lateral back-to-back diodes, but also provide guidelines for device structure optimization.

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