研究生: |
朱柏儒 Chu, Po-Ju |
---|---|
論文名稱: |
橫向型高電壓氮化鎵金氧半場效電晶體與氮化銦鎵金氧半場效電晶體之研製 Investigation of Lateral High Voltage u/p-GaN MOSFETs and InGaN MOSFETs |
指導教授: |
黃智方
Huang, Chih-Fang |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering |
論文出版年: | 2010 |
畢業學年度: | 99 |
語文別: | 中文 |
論文頁數: | 80 |
中文關鍵詞: | 氮化鎵 、氮化銦鎵 、金氧半場效電晶體 、高電壓 、離子佈值 、橫向型 |
外文關鍵詞: | GaN, InGaN, MOSFET, High voltage, Implantation, Lateral |
相關次數: | 點閱:4 下載:0 |
分享至: |
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
本論文研製橫向型高電壓氮化鎵金氧半場效電晶體,同時利用乾蝕刻平台結構與離子佈值技術的雙重絕緣結構隔絕基板表面漏電流。我們證實空乏式N型氮化鎵金氧半場效電晶體最大電流密度為100mA/mm,臨界電壓為-3V,導通電阻為35 mΩ-cm2 (VGS=35V),場效載子遷移率為26 cm2/Vs(VDS=0.1V);同時證實增進式P型氮化鎵金氧半場效電晶體,臨界電壓為2.37V,最大電流密度為70mA/mm,導通電阻為48 mΩ-cm2 (VDS=0.5V),場效載子遷移率為21 cm2/Vs(VDS=0.1V)。在通道長度為3μm,漂移區長度為25μm的P型氮化鎵金氧半場效電晶體元件,最大崩潰電壓為120V。
另外研製橫向型高電壓氮化銦鎵金氧半場效電晶體,藉由氮化銦鎵通道試圖改善氮化鎵金氧半場效電晶體的場效載子遷移率,我們使用源極與汲極金屬未燒結方式以及未加入源極與汲極重摻雜結構製作金氧半場效電晶體,全程皆為低溫製程,同時延伸閘極與汲極之間距離,製作空乏式高電壓金氧半場效電晶體,最大崩潰電壓為380V,通道長度100μm的最大場效載子遷移率為93 cm2/Vs。
Lateral high-voltage single RESURF GaN MOSFETs on sapphire substrates were investigated and fabricated, with mesa isolation and Zn implantation isolation to avoid surface leakage. We demonstrated depletion-mode uGaN MOSFETs with a maximum drain current density up to 100mA/mm, a threshold voltage of -3V and a specific on-state resistance of 35mΩ-cm2 when VG=35V. The channel mobility is 26 cm2/Vs extracted from linear region at VDS=0.1V. Furthermore, we have demonstrated enhancement-mode pGaN MOSFETs with a threshold voltage of 2.37V and a maximum drain current density higher than 70mA/mm, a specific on-state resistance as low as 48mΩ-cm2 at VG=35V. The channel mobility of 21 cm2/Vs is extracted from linear region at VDS=0.1V. A pGaN MOSFET with a channel length of 3μm and a RESURF length of 25 μm shows a maximum breakdown voltage up to 120V.
A lateral high-voltage InGaN MOSFET has also been investigated attempting to improve the channel mobility of GaN MOSFETs. In the fabrication of InGaN MOSFET, no ion implantation and no sintering for source and drain region was done and all fabrication has been realized at low temperatures. The depletion-mode InGaN HV-MOSFET was fabricated with the maximum breakdown voltage of 380V. The channel mobility measured from a long channel (100μm) device is 93 cm2/Vs.
參考文獻
[1]T. P. Chow, “SiC and GaN High-Voltage Power Switching Device”, Materials Science Forum Vols. 338-342, pp. 1155-1160, 2000.
[2] M. E. Levinshtein, S. L. Rumyantsev, and M. S. Shur, “Properties of Advanced Semiconductors Materials: GaN, AlN, InN, BN, SiC, SiGe”, John Wiley & Sons, Inc., 2001
[3] W. Götz, N. M. Johnson, C. Chen, H. Liu, C. Kuo, and W. Imler, “Activation energies of Si donors in GaN”, Applied Physics Letters, vol. 68, pp. 3144-3146, 1996.
[4] S. Nakamura, T. Mukai, M. Senoh, and N. Iwasa, “Thermal annealing effects on p-type Mg-doped GaN films”, Japanese Journal of Applied Physics, vol. 31, pp. L139- L142, 1992.
[5] S. Nakamura, N. Iwasa, M. Senoh, and T. Mukai, “Hole compensation mechanism of p-type GaN films”, Japanese Journal of Applied Physics, vol. 31, pp. 1258-1266, 1992
[6] S. Nakamura, “III-V nitride-based light-emitting diodes”, Diamond and Related Materials, vol. 5, pp. 496-450, 1996.
[7] B. A. Hull, S. E. Mohney, H. S. Venugopalan, and J. C. Ramer “Influence of oxygen on the activation of p-type GaN”, Applied Physics Letters, vol. 76, pp. 2271-2273, 2000.
[8] F. Ren, M. Hong, S. N. G. Chu, M. A. Marcus, M. J. Schurman, A. Baca, S. J. Pearton, and C. R. Abernathy,“Effect of temperature on Ga2O3(Gd2O3)/GaN metal–oxide–semiconductor field-effect transistors,” Applied Physics Letters, vol.73, Number 26,pp. 3893-3895,1998.
[9] K. Matocha, T.P. Chow, and R.J. Gutmann, “High-Voltage Accumulation-Mode Lateral RESURF GaN MOSFETs on SiC Substrate,” Proceedings of the 20th International Symposium on Power Semiconductor Devices & IC's(ISPSD), pp. 54-57, April 14-17 ,2003.
[10] K. Matocha,T.P. Chow, and R. J. Gutmann , “High -Voltage Normally Off GaN MOSFETs on Sapphire Substrates” IEEE Transactions on Electron Devices, vol. 52, no. 1, January 2005.
[11] W. Huang, T. Khan, and T. P. Chow, “Enhancement-Mode n-Channel GaN MOSFETs on p and n-GaN/Sapphire Substrates.” IEEE Electron Device Letters,vol.27,no. 10, October 2006.
[12] Y.Q. Wu, P.D. Ye, G.D. Wilk, and B. Yangc, “GaN metal-oxide-semiconductor field-effect-transistor with atomic layer deposited Al2O3 as gate dielectric,” Materials Science and Engineering B, vol.135, pp. 282–284, 2006.
[13] Y. Niiyama, T. Shinagawa, S. Ootomo, H. Kambayashi, T. Nomura, and S. Yoshida, “High-quality SiO2/GaN interface for enhanced operation field-effect transistor,” phys. stat. sol. (a), vol. 204, No. 6, pp. 2032–2036, 2007.
[14] Y. Niiyama, H. Kambayashi, S. Ootomo, T. Nomura, and S. Yoshida, “250oC operation normally-off GaN MOSFETs,” Solid-State Electronics, vol. 51, pp. 784–787, 2007.
[15] S. Sugiura, S. Kishimoto, T. Mizutani, M. Kuroda, T. Ueda, and T. Tanaka, “Enhancement-mode n-channel GaN MOSFETs fabricated on p-GaN using HfO2 as gate oxide,” IEEE Electronics Letters, vol. 43, no. 17, 2007.
[16] Y. C. Chang, W. H. Chang, H. C. Chiu, L. T. Tung, C. H. Lee, K. H. Shiu, M. Hong, J. Kwo, J. M. Hong, and C. C. Tsai, “Inversion-channel GaN metal-oxide-semiconductor field-effect transistor with atomic-layer-deposited Al2O3 as gate dielectric,” Applied Physics Letters, vol. 93, 053504, 2008
[17] W. Huang, T.P. Chow, Y. Niiyama, T. Nomura and S. Yoshida, “Lateral Implanted RESURF GaN MOSFETs with BV up to 2.5 kV,” Proceedings of the 20th International Symposium on Power Semiconductor Devices & IC's(ISPSD), pp. 291-294, May 18-22, 2008.
[18] Y. Niiyama, S. Ootomo, J. Li, H. Kambayashi, T. Nomura, S. Yoshida, K. Sawano, and Y. Shiraki, “Si Ion Implantation into Mg-Doped GaN for Fabrication of Reduced Surface Field Metal–Oxide–Semiconductor Field-Effect Transistors,” Japanese Journal of Applied Physics, Vol. 47, No. 7, pp. 5409-5416, 2008.
[19] W. Huang, Z. Li, T. P. Chow, Y. Niiyama, T. Nomura, and S. Yoshida, “Enhancement-mode GaN Hybrid MOS-HEMTs with Ron,sp of 20 mΩ-cm2,” Proceedings of the 20th International Symposium on Power Semiconductor Devices & IC's(ISPSD), pp. 295-298, May 18-22, 2008.
[20]W. Huang, T. P. Chow, Y. Niiyama, T. Nomura, and S. Yoshida, “730V, 34mΩ-cm2 Lateral Epilayer RESURF GaN MOSFET,” Proceedings of the 21st International Symposium on Power Semiconductor Devices & IC's(ISPSD), pp. 29-32, June 14-18, 2009.
[21] K. Tang, Z. Li, T. P. Chow, Y. Niiyama, T. Nomura, and S. Yoshida, “Enhancement-mode GaN Hybrid MOS-HEMTs with Breakdown Voltage of 1300V,” Proceedings of the 21st International Symposium on Power Semiconductor Devices & IC's(ISPSD), pp. 279-282, June 14-18, 2009.
[22] H. Kambayashi, Y. Satoh, Y. Niiyama, T. Kokawa, M. Iwami, T. Nomura,and S. kato, ” Proceedings of the 21st International Symposium on Power Semiconductor Devices & IC's(ISPSD), pp. 21-24, June 14-18, 2009.