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研究生: 李自強
Robert T.-C. Li
論文名稱: 以歌選歌晶片: 重複使用法
Chip Design for Query-by-Singing: A Reuse Approach
指導教授: 吳中浩
Allen C.-H. Wu
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊工程學系
Computer Science
論文出版年: 2000
畢業學年度: 88
語文別: 中文
論文頁數: 82
中文關鍵詞: 以歌選歌重複使用
外文關鍵詞: core-reuse-based, Query-by-Singing, Dynamic Time Warping, DTW, Key Transposition, core-centric, design methodology, QBS
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  • 在這篇論文裡,我們使用一種core-reuse-based設計方法來設計晶片。
    這顆晶片執行以歌選歌的應用。

    它可以用來計算使用者所唱的歌與資料庫裡其它的歌的相似程度。

    我們使用C語言來開始設計這顆晶片。

    除了應用operator-rescheduling方法來縮短晶片上的critical path外,我們也考慮了晶片的可測性(Design for Testability)。

    為了證明這個架構及core-reuse-based設計方法的可行性,我們已經成功的利用Compass cell library在台積電0.35µm 1P4M CMOS Silicide process模擬出正確的結果。

    Die的大小為4.3752x4.3752mm2,最高工作頻率為66MHz。

    這個以歌選歌晶片可以被應用在KTV的點歌系統中。

    因為製程技術愈來愈進步,我們可以把更多的功能整合到一顆晶片,這就是System-On-a-Chip (SOC)。為了因應SOC愈來愈高的複雜度,我們提出兩個方法來解決:(1)用更高階的硬體描述語言來設計晶片,(2)soft block或hard block的再使用。

    在這篇論文裡,我們使用一種core-reuse-based設計方法來設計晶片。這個研究的主要目的是評估從更高階語言及core再使用來設計晶片的可行性。我們先用C語言來描述晶片的功能。因為C是很多人都會使用的語言,而且很容易模擬及修改。我們實作了一顆以歌選歌晶片來評估我們所提出的兩個方法,這種晶片以後有可能出現在KTV的點歌系統中。


    In this thesis, we present a chip design practice using the core-reuse-based design methodology.
    The chip is targeted to a Query-by-Singing application.

    The QBS chip can determine the similarity degree between one test-song and several songs in the database.

    We use C programming language as our design entry.

    We apply operator-rescheduling method to shorten the critical path. Besides, Design for Testability (DFT) is also considered. To prove the correctness of the proposed architecture and viability of the core-reuse-based design methodology, we have successfully implemented it using Compass cell library targeted at TSMC 0.35 µm 1P4M CMOS Silicide process.

    The die size is 4.3752x4.3752 mm2 and the maximum frequency is 66 MHz.

    This QBS chip can be applied to the song-selection process of KTV system.

    Abstract .....................................................2 Contents .....................................................3 List of Figures ............................................5 List of Tables ............................................6 Chapter 1: Introduction ...................................7 Chapter 2: Query by Singing ...................................9 2.1 Overview ............................................9 2.2 The Query-by-Singing Music Search Engine ........9 2.2.1 Postprocessing ..................................10 2.2.2 Similarity Comparison .........................14 2.2.2.1 Tune Variance ..................................14 2.2.2.2 Tempo Variance .........................15 Chapter 3: Chip Architecture and Design Methodology .......19 3.1 Chip Architecture ..................................19 3.2 Design Methodology and Considerations ................21 Chapter 4: Core Definition and Development for Speech Recognition Applications ..................................23 4.1 Overview ...........................................23 4.2 Core Definition ..................................26 4.3 Core Development ..................................27 Chapter 5: Chip Implementation .........................28 5.1 The Design Flow ..................................28 5.2 Chip Configuration ..................................31 5.3 The Chip Implementation .........................32 Chapter 6: Conclusions ..................................40 Appendix A: The algorithmic-level code of f- ................41 Appendix B: The RTL code of f- .........................45 Appendix C: The C-based spec. of the postProcess .......57 Appendix D: The C-based spec. of the DTW ................61 Appendix E: The VHDL spec. of the postProcess ................64 Appendix F: The VHDL spec. of the DTW ................72 Appendix G: The algorithmic-level code of log2 .......76 Bibliography ...........................................81

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