堆疊式封裝 (Package-on-Package ; PoP) 的技術乃將兩個封裝體垂直堆疊至印刷版電路 (Printed Circuit Coard ; PCB), 此技術已發展為先進的半導體封裝技術。
PoP封裝體主要優點為較傳統的封裝體可占用更少的空間。如此 , 這樣的設計也造成 PoP翹曲 (Warpage) 之主要缺點。本研究探討 PoP 封裝體製程參數對於翹曲之影響 , 包含基板溫度、注膠速度、注膠溫度以及模壓。進一步探討 IC (Integrated Circuit) 封膠位置 (行、列) 對於翹曲之影響。採用的方法為實驗設計以及 ANSYS 翹曲的模擬分析。
本研究提出基板溫度、注膠速度、注膠溫度及模壓因子之回歸模型來預測翹曲值。研究結果顯示在製程中基板溫度及模壓與注膠速度及注膠溫度存在交互作用 , 因此基板溫度、注膠速度、注膠溫度以及模壓不能被單獨考慮。此外 , 本研究結果得知 , 此56種位置依照對翹曲程度可分為11群 , 其中最大之翹曲發生在整片封膠完成品之左右兩側的 IC 封裝體上。

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