本研究以電感耦合式電漿蝕刻機台發展電漿蝕刻製程，研究蝕刻高介電係數材料HfAlO、二氧化鉿（HfO2）和矽晶圓蝕刻特性，提升高介電係數材料蝕刻速率與對矽晶圓之蝕刻選擇比。實驗操作參數為控制電漿源功率、偏壓功率、腔體壓力與蝕刻時間，研究電漿參數對蝕刻速率與選擇比的影響與變化。由文獻得知離子轟擊能量和反應物種強度對蝕刻速率有顯著影響，因此，利用電漿診斷技術進行線上監控電漿狀態，使用射頻阻抗計（Impedance meter），測量晶圓座上的離子電流（Ion current）和射頻峰值電壓（RF peak voltage）；以光譜儀量測氯原子（Cl：725.7 nm）、氯化硼分子（BCl：271.99 nm）、氬原子（Ar：750.4 nm）光譜強度幫助分析蝕刻特性。
使用三氯化硼混合氬氣電漿蝕刻HfAlO、HfO2與圖案矽晶圓。實驗發現三氯化硼電漿容易在矽晶圓表面形成鈍化層，產生沈積反應，以致於矽晶圓幾乎不蝕刻，可得高介電係數材料對矽晶圓蝕刻選擇比到達10以上。

The etching properties of HfAlO, HfO2 and silicon wafer with pattern were investigated using inductively coupled high density plasma etcher. To develop plasma etch process of high dielectric gate oxide. The effects of the experimental parameters, including ICP power, bias power, chamber pressure and etching time, on the etch rate and selectivity were studied. The ion energy and reactive species were found to significantly enhance the HfAlO etch rate and improve the etching selectivity to Si from reference. Therefore, we measured the radio frequency peak voltage and ion current by impedance meter. We measured the intensity of plasma species, including Ar(750.4 nm), Cl(725.7 nm) and BCl(271.99 nm) by optical emission spectroscopy.
Plasma etching of HfAlO, HfO2 and silicon wafer with pattern was studied in BCl3/Ar plasmas. The etch rate of Si is suppressed in BCl3 plasmas, due to formation of the passivation layer and reduced Cl density. We increased etching selectivity above 10 at lower bias power and chamber pressure.

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