穿透矽通道 (Through-Silicon Via) 是一個有希望能夠減少三維晶片下繞線長度的技術。然而，穿透矽通道所佔的面積卻會對三維晶片造成負面的影響。使用太多的穿透矽通道可能會造成晶片的尺寸增加，這樣一來，反而會失去原本穿透矽通道帶來的好處。因此，在這篇論文中我們將會對考慮了穿透矽通道所佔面積影響後的繞線長度做最小化的處理。因為在三維晶片下，佈局這個步驟會影響穿透矽通道的數量，所以我們的論文在佈局這個步驟中提出了一個最小成本付出的切割演算法。最後，我們在論文中比較了許多不同的演算法，實驗結果顯示最小成本付出的切割演算法是最好的。更重要的是，它也是最快的演算法。

Through-Silicon Via (TSV) is a promising technology to reduce the length of
interconnect in a three dimensional integrated circuit (3D-IC). However, the
area overhead of TSV also poses a negative impact on a 3D-IC. Using too
many TSVs will increase the die size and cancel out the benefit brought by
TSV. Therefore, in this paper we will minimize wire length taking into account
the number of TSVs and their size during placement in 3D-IC. Since the
number of TSVs is determined by placement, a minimum cost cut algorithm
is proposed in this thesis. The experimental result shows the comparisons in
different algorithms. The best algorithm is minimum cost cut partitioning
placement algorithm. Most of all, the runtime is the fastest, too.

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