拓撲絕緣體是一種具有自旋-軌道耦合之狄拉克錐金屬性表面態之新穎材料，其強自旋-軌道耦合的性質使其非常有潛力應用在未來之超低功耗自旋電子學原件。然而由於其材料性質先天性的有過多的缺陷而使得費米能階位於導帶中，因此使得表面態之貢獻受到壓抑。我們藉由將拓撲絕緣體薄膜成長在高介電質氧化物上來製作背閘極結構，並使用背閘極調整拓撲絕緣體薄膜之費米能階，使其向能隙移動，以增加拓撲絕緣體特殊之表面態在傳輸現象中的貢獻。
我們成長了一系列4QL~150QL硒化鉍薄膜於藍寶石基本上以調查拓撲絕緣體特殊之表面態之傳輸性質。在磁阻的量測中，我們觀察到了弱反局域效應 (Weak anti-localization effect)，顯示拓撲絕緣體特殊之表面態具有時間反演對稱之性質。另外，藉由以雙載子模型對磁阻之實驗數據進行擬合，得到拓撲絕緣體薄膜表面態之貢獻約為33%。除此之外，我們也將一系列不同厚度之拓撲絕緣體薄膜成長在包含了藍寶石、釔鐵石榴石以及二硫化鉬等各式不同材料上比較傳輸現象。
我們將硒化鉍薄膜成長在以原子層化學氣相沉積系統成長之包含了氧化鋁及氧化釔之超薄高介電質氧化物上製作背閘極結構，並以原子力顯微鏡、穿透式電子顯微鏡、反射式低能電子繞射及X光繞射對硒化鉍薄膜進行結構分析。我們示範了以背閘極調控硒化鉍薄膜之費米能階，並成功的將費米能階移入能隙中。另外，我們還藉由降低硒化鉍薄膜薄膜之厚度、提高氧化物層之介電系數以及摻雜碲形成鉍、硒及碲之三元化合物之方式來增強調控費米能階之能力，我們很成功的將費米能階調到非常接近狄拉克點之位置。

Topological insulators (TI) were predicted and proven to have Dirac cone-like metallic helical surface state with strong spin-orbital coupling, making the TI a very promising spintronics material. However, the high density of intrinsic defects in TI materials has caused high doping levels, and made the Fermi level (EF) to locate in the bulk conduction band. Nevertheless, the electrical field effect may be utilized to tune the EF to move toward the conduction band. We proposed to fabricate the back gate structure by growing TI films on high- oxide layers deposited on conducting substrates. The advantage of such a structure is to leave the top surface entirely open for subsequent fabrications of FM/TI, SC/TI structures intended for various studies. Additionally, employing high- oxide thin films as the dielectrics can effectively reduce the operating voltage.
A series of high quality Bi2Se3 thin films with thickness 4QL~150QL were grown on various substrate to study the transport property. Weak anti-localization effect was observed in low temperature transport measurement indicating the presence of the time-reversal symmetry protected surface state. The derived α~0.4 to 0.7, which shows there is 1 to 2 independent 2D channels in TI, consistent with existence of the top and bottom surface states. l_ϕ is derived ranging from 100nm to 300nm, about the same order of typical sizes of the triangular domains of Bi2Se3 thin films. For the sample thickness above 20nm, l_ϕ is nearly a constant value, implying the WAL effect is not influenced by the bulk, and should be largely contributed by the surface state. For Bi2Se3 film grown on YIG, topological surface channel was observed by the much smaller α, l_ϕ and surface state contribution, suppressed by magnetic order from YIG. Moreover, a series of Hall effect measurements for Bi2Se3 films with different thickness grown on various substrate were conducted. We found that n3D decreases with increasing the film thickness regardless of the substrate, which means better film quality can be obtained with increasing the film thickness. And our film quality is superior to S. Oh’s for film thickness above 20QL. For the films grown on MoS2, surprisingly, n3D is the smallest, about only half of the sample grown on sapphire for 14QL sample. And it is found that n3D does not decrease as the lattice mismatch of the substrate becomes smaller. The effect of employing an Se capping layer to prevent film degradation in ambient condition was also studied.
High quality Bi2Se3 thin films (6QL~10QL) were grown on high- oxide including Al2O3 and Al2O3/Y2O3 multi-layer to fabricate the back gate structure. The film is highly crystalline along c-axis confirmed by RHEED, AFM, TEM and XRD. Large field effect was observed. We successfully tuned the EF within the band gap making the surface state become the dominant state responsible for carriers. Furthermore, to develop the best capability of tuning EF, various tests were performed, including cutting down TI film thickness, doping Te to Bi2Se3 to reduce intrinsic defects, and inserting Y2O3 layer to Al2O3 to enhance the effective dielectric constant. We are able to tune EF very close to Dirac point in ternary compound Bi2Te2Se thin films.

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