本論文研究快閃式類比數位轉換器（Flash analog-to-digital converters），應用於CMOS電容式微機電超音波感測器後端之超音波訊號的處理。超音波感測器之前端感測介面電路利用運算放大器電容性回授進行感測。感測電容置於運算放大器的輸入端，給定直流偏壓電壓點。當感測電容接收到超音波訊號，由感測電容值的改變，電容比例發生變化經由回授運算使而輸出端產生電壓變化。經過傅立葉頻率分析得到感測超音波訊號的頻寬約為15 MHz。
超音波感測器後端的類比數位轉換器為了提供足夠的操作頻率，我們採用最快速的快閃式類比數位轉換器架構。首先，輸入端的類比連續時間（Continuous-time）訊號會經由取樣且保持電路變成類比離散時間（Discrete–time）訊號。當此離散訊號不隨前端類比訊號改變的期間，類比數位轉換器將對其進行量化（Quantization）。類比數位轉換器通常利用比較器進行量化，我們採用時序控制（Clock-controlled）型的比較器。快閃式架構的量化方法為經由比較器陣列，將輸入訊號同時地對定義的參考準位同時做比較，量化結果為溫度碼。然而比較器的輸入端偏移電壓（Offset voltage）將嚴重影響量化的準確性。此處我們可由Monte Carlo模擬來估計偏移電壓的大小。個別比較器的隨機偏移電壓利用電阻性平均網路作平均，降低對比較器陣列量化準確性影響。溫度碼的後端處理經過溫度碼邊緣偵測器，溫度碼邊緣再由編碼器轉為6位元二進位碼。溫度碼邊緣偵測器及編碼器都是由CMOS邏輯閘建構而成。依據前述設計我們在TSMC 0.35-μm CMOS製程上實現一個工作電壓3.3 V、取樣頻率達到135 MHz、解析度為6位元的快閃式類比數位轉換器。類比數位轉換器消耗功率為110.3 mW，晶片實作出面積為2.2×2.3平方釐米。

This work reports a CMOS flash analog-to-digital converter (ADC) for capacitive micromachined ultrasonic sensors.
The ultrasonic sensing element is fabricated by post-processing in a conventional 0.35-μm CMOS process. The sensing circuit of ultrasonic sensor is composed of the capacitive sensing element and a feedback capacitor in the feedback loop of a wideband Opamp. Once the sensing element receives the ultrasound, the ratio of capacitances is changed and a sensed signal is read out at the output. The measured signal bandwidth is approximately 15 MHz.
The flash ADC is introduced to in the backend. To increase the linearity of the system, a bootstrapped sample-and-hold circuit is used. Discrete-time sampled signals are quantized by a comparator array, which consists of two-stage pre-amplifiers and regenerative latches. The input-referred random offset voltages of comparators are suppressed by resistive array averaging. A 6-bit 135 MS/s flash ADC is designed with INL/ DNL peaks at ±0.2 LSB and ±0.15 LSB, respectively. The digital backend is a logic-gate based 1-out-of-64 code generator with bubble correction and fat tree encoder. The power consumption is 110.3 mW at 135 MS/s with 3.3-V power supply. This ADC is fabricated in the TSMC 2P4M 0.35-μm CMOS process.

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