隨著嵌入式系統中多媒體多媒體應用程式的增加，我們需要更高效能的嵌入式系統來處理日漸繁重的多媒體運算。因此現今的嵌入式系統大都包含了一顆主要處理單元及搭配上一顆數位訊號處理器來加速處理效能。此外，數位訊號處理器也藉由增加記憶體大小、擴大定址範圍、加大記憶體及暫存器的寬度或是增加平行度等方式來加速處理器的效能。由於傳統的數位訊號處理器擁有同時同時處理多個記憶體存取的能力及最佳化過的運算指令，所以這種非對稱雙核心的架構可以得到比一般的單核架構更好的效能改進。然而，儘管硬體的效能得到了強化，硬體上的新特色若沒有得到軟體工具的支援，仍然無法建構一個高效的嵌入式系統。因此在這篇論文中討論了如何將硬體上的新增加的特色融入嵌入式軟體開發工具。討論的議題包含了編譯器、組譯器、連結器、ELF格式及函式庫的支援等，我們提出了幾個方案來支援硬體上的新特色。之後以一個假想平台作為實驗環境，實際驗證上述討論的可行性。

With increasing number of multimedia applications for embedded systems, greater computing powers are needed for embedded system to support applications. Therefore, the embedded systems now frequently contains one MPU (main process unit) to run regular tasks and one DSP (digital signal processor) to handle special tasks which need lots of computations. In addition, there are needs to boost performance of DSP accelerators, this frequently coming with needs to handle more diversified applications. Frequently seen extensions include the extension of the DSP processors with more instructions to speed up a particular set of applications, the increase of data memory and program memory banks, the increase of instruction address and address bus, the increase of memory width, the increase of data size for each register, the increase of register size, the increase of concurrent execution units, etc. The advantage of this is that DSP core has more special instructions such as accumulate operation or multiple memory back access to accelerate execution speed or increase data bandwidth, and therefore obtains better performance than uni-core architecture. However, if tool-chain can not use these hardware features e±ciently the advantage of the enhanced system can not be performed. In this thesis, we investigate the issues to enable toolkit flows for such DSP extensions via a case study with GCC flows on audio DSP processors. The toolkit flow thus consists of compilers, assembler, linkers, ELF format, and library designs. Experiments are performed to show that our flow is a workable solution in practice.

[1] J. A. Fisher, P. Faraboschi, and C. Young, "Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools." Morgan Kaufmann publishers, 2004.

[2] K.-Y. Shieh, Y.-J. Lin, C.-C. Huang, and J. K. Lee, "Enhancing microkernel performance on vliw dsp processors via multiset context switch", Journal of VLSI Signal Processing Systems, 2005.

[3] Y. C. Lin, C. H. Lu, J. Wu, C. L. Tang, Y.-P. You, Y. Moo, and J. K. Lee, "Effective code generation for distributed and ping-pong register files: a case study on pac vliw dsp cores," Journal of VLSI Signal Processing Systems, 2005.

[4] Y.-C. Lin, Y.-P. You, and J. K. Lee, "Register allocation for vliw dsp processors with irregular register files," in CPC 2006, Jan. 2006.

[5] C. Wu, K.-Y. Hsieh, Y.-C. Lin, C.-J. Wu, W. li Shih, S. C. Chen, C.-K. Chen, C.-C. Huang, Y.-P. You, and J.-K. Lee, "Integrating compiler and system toolkit flow for embedded vliw dsp processors," in RTCSA 06, Aug. 2006.

[6] C.-K. Chen, L.-H. Tseng, S.-C. Chen, Y.-J. Lin, Y.-P. You, C.-H. Lu, and J.-K. Lee, "Enabling compiler flow for embedded vliw dsp processors with distributed register files," in Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), 2007. 39 BIBLIOGRAPHY 40

[7] STC/M310, PACDSP 2.0 Instruction Set Menu, ITRI, 2000.

[8] ADSP-2100 Family User's Manual, Analog Device Inc., 9/1995.

[9] ADSP-218x DSP Instruction Set Reference, Analog Device Inc., Nov. 2004.

[10] http://gcc.gnu.org/onlinedocs/gccint/, Free Software Foundation, 2005.

[11] ADSP 2181 hardware reference, Analog Device Inc., 2001.

[12] G21 GNU C Compiler for ADSP 21xx, Analog Device, 2001. [Online]. Available: http://www.kvaleberg.com/g21.html

[13] C. by Keith Clifford, SharpShin Open21xx Binary-utility Project, 2004. [Online]. Available: http://www3.telus.net/sharpshin/adi.html

[14] Tool Interface Standard (TIS) Executable and Linking Format (ELF) Specification, TIS Committee, 1995. [Online]. Available: http://www.x86.org/ftp/manuals/tools/elf.pdf

[15] 64-bit ELF Object File Specification, MIPS Technologies, Silicon Graphics Computer Systems, 2003. [Online]. Available: http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf

[16] N. H. Beebe, IEEE 754 floating point test software, 2005.

[17] IEEE, ANSI/IEEE Standard 754: Standard for Binary Floating Point Arith-metic, 1985.