氧化鉿/氧化鋯超晶格介電質於矽鍺/矽超晶格通道環繞式邏輯電晶體與非揮發性記憶體之特性研究

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研究生：	姚怡如 Yao, Yi-Ju
論文名稱：	氧化鉿/氧化鋯超晶格介電質於矽鍺/矽超晶格通道環繞式邏輯電晶體與非揮發性記憶體之特性研究 Investigation of Hafnium Oxide/Zirconium Oxide Superlattice Dielectric on Silicon-Germanium/Silicon Superlattice Channel Gate-All-Around Logic Transistors and Non-Volatile Memory
指導教授：	吳永俊 Wu, Yung-Chun
口試委員:	侯福居 Hou, Fu-Ju 羅廣禮 Luo, Guang-Li 金雅琴 King, Ya-Chin 胡心卉 Hu, Hsin-Hui
學位類別：	博士 Doctor
系所名稱：	半導體研究學院 - 半導體研究學院 College of Semiconductor Research
論文出版年：	2025
畢業學年度：	113
語文別：	英文
論文頁數：	190
中文關鍵詞：	超晶格、矽、矽鍺、鰭式場效電晶體、環繞式閘極場效電晶體、氧化鉿鋯、鐵電、負電容、變構相界、奈米薄片、記憶體、多位元、多層儲存單元
外文關鍵詞：	Superlattice(SL), Silicon(Si), Silicon-Germanium(SiGe), Fin Field Effect Transistor(FinFET), Gate-All-Around Field Effect Transistor(GAAFET), Hafnium Zirconium Oxide(Hf1-xZrxO2, HZO), Ferroelectric(FE), Negative Capacitance(NC), Morphotropic Phase Boundary(MPB), Nanosheet(NS), Memory, Multibit, Multi-level Cell(MLC)
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本研究探討氧化鉿/氧化鋯 (HfO₂/ZrO₂) 超晶格 (Superlattice, SL) 介電質在矽鍺/矽 (SiGe/Si) 超晶格通道環繞式閘極 (Gate-All-Around, GAA) 邏輯電晶體 (Transistor) 與非揮發性記憶體 (Non-Volatile Memory, NVM) 之特性。研究主軸著重於通道(Channel)與高介電常數(High Dielectric Constant, high-k) 材料的特性、優化與應用。
首先，本研究探討矽鍺/矽超晶格結構作為電晶體通道，以提升邏輯與記憶體元件的效能。透過應變(Strain)工程、量子井效應(Quantum Well, QW)與高遷移率(Mobility)材料的結合，提升元件開關速度、閘極(Gate)控制能力與記憶體可靠度(Reliability)特性，同時確保與先進半導體製程的兼容性。
其次，本研究系統性地分析超晶格氧化鉿/氧化鋯介電質的單層厚度、整體組成比例與退火溫度之相關性，並探討這些參數對電特性的影響，進一步將其應用於邏輯電晶體與多位元(Multibit)記憶體元件。
本研究透過材料工程的優化，致力於開發高效能且可靠的半導體元件，並提供新穎的材料設計策略，以推動次世代電子元件的微縮與功能提升。透過通道與介電材料的協同最佳化，本研究將有助於延續摩爾定律的發展，為先進半導體技術的演進提供關鍵技術支撐。

This study investigates the characteristics of hafnium oxide/zirconium oxide (HfO₂/ZrO₂) superlattice (SL) dielectric in silicon-germanium/silicon (SiGe/Si) superlattice channel gate-all-around (GAA) logic transistors and non-volatile memory (NVM). The research focuses on both channel and high dielectric constant (high-k) materials, exploring their properties, optimization, and applications.
First, the study examines the use of SiGe/Si superlattice structures as transistor channels to enhance performance in both logic and memory applications. By integrating strain engineering, quantum well (QW) and high-mobility materials, this approach aims to improve switching speed, gate control, and memory reliability while maintaining compatibility with advanced semiconductor fabrication processes.
Second, the research investigates the correlation between individual layer thickness, overall composition ratio, and annealing temperature of HfO₂/ZrO₂ superlattice dielectric. The impact of these parameters on electrical characteristics is systematically analyzed, followed by practical implementation in both logic transistor and multibit memory applications.
Through these investigations, this study contributes to the development of high-performance and reliable semiconductor devices, offering new insights into material engineering strategies that extend the scaling and functionality of next-generation electronics. By optimizing both channel and dielectric materials, this research serves as a key enabler for the continued progression of semiconductor technology, aligning with the ongoing evolution of Moore’s Law.

中文摘要    i
Abstract    iii
Acknowledge    v
Contents    vi
List of Figures    xii
Chapter 1  Introduction    1
1 Moore's Law    1
1.1 Challenges of Device Scaling and Opportunities    3
2 Evolution of Memory Technologies    6
2.1 Von Neumann Architecture and Its Bottlenecks    9
3 High Mobility Channel Materials    11
4 Strain Engineering Techniques    14
4.1 Applications of Strained Silicon    14
4.2 Applications of Strained Silicon-Germanium    18
5 High Dielectric Constant Materials    21
5.1 Ferroelectric Hafnium Dioxide-Based Materials    22
5.2 Hafnium Zirconium Superlattice dieletric    26
6 Structure of the Thesis    30
Chapter 2  Theoretical Foundations    33
1 Operating Mechanisms of Devices    33
1.1 Metal-Oxide-Semiconductor Field-Effect Transistor    33
1.2 Complementary Metal-Oxide-Semiconductor Inverter    36
1.3 Non-volatile Memory    39
2 Key Parameters of Logic Transistors    43
2.1 Threshold Voltage    43
2.2 Subthreshold Swing    45
2.3 Negative Capacitance Effect    46
2.4 Drain-Induced Barrier Lowering    49
3 Key Parameters of Memory Devices    50
3.1 Relationship Between Memory Window and Channel    50
3.2 Charge Trapping and Interface Quality    53
3.3 Impact of Memory Read Operations    56
3.4 Effects of Temperature on Memory Endurance    59
4 High Mobility Channels    61
4.1 Mobility and Strain Engineering Techniques    61
4.2 Superlattice Silicon-Germanium/Silicon Epitaxial Structures    64
5 Crystallinity of Dielectric Materials    69
5.1 Morphotropic Phase Boundary    69
6 Overview of Material Analysis Techniques    73
6.1 Raman Spectroscopy    73
6.2 X-ray Reciprocal Space Mapping    75
6.3 Hall Effect Measurement    78
Chapter 3  Comparison of Logic Transistors with Different Channel Materials    80
1 Motivation    80
2 Device Fabrication    82
3 Results and Discussion    84
3.1 Comparison of Logic Transistors with Silicon, Silicon-Germanium and Silicon-Germanium/Silicon Superlattice Channel    84
3.1.1 Material Analysis    84
3.1.2 Electrical Analysis    88
3.2 Strained Silicon-Germanium/Silicon Superlattice FinFETs and Inverters    91
3.2.1 Electrical Analysis    91
3.2.2 TCAD Simulation    92
4 Summary    93
Chapter 4  Application of Ferroelectric Hafnium Zirconium Oxide on Silicon-Germanium/Silicon Channel Logic Transistors and Inverters    94
1 Motivation    94
2 Device Fabrication    96
3 Results and Discussion    97
3.1 Ferroelectric Hafnium Zirconium Oxide Applied on Silicon-Germanium/Silicon Stacked MIS Capacitors    97
3.1.1 Material Analysis    97
3.2 Ferroelectric Hafnium Zirconium Oxide Applied on Silicon-Germanium/Silicon Channel Ω-Gate Logic Transistors and Inverters    98
3.2.1 Material Analysis    98
3.2.2 Electrical Analysis    99
3.2.3 Technology Computer-Aided Design Simulation    102
4 Summary    104
Chapter 5  Application of Hafnium Zirconium Superlattice Oxide in Gate-All-Around Logic Transistors and Inverters with Silicon-Germanium/Silicon Superlattice Channel    105
1 Motivation    105
2 Device Fabrication    107
3 Results and Discussion    108
3.1 Hafnium Zirconium Superlattice Oxide MIM Capacitors    108
3.1.1 Material Analysis    108
3.1.2 Electrical Analysis    110
3.2 Hafnium Zirconium Superlattice Oxide MIS Capacitors    112
3.2.1 Material Analysis    112
3.2.2 Electrical Analysis    113
3.3 Hafnium Zirconium Superlattice Oxide in Gate-All-Around Logic Transistors and Inverters with Silicon-Germanium/Silicon Superlattice Channel    115
3.3.1 Material Analysis    115
3.3.2 Electrical Analysis    117
4 Summary    119
Chapter 6  Study of Composition-Dependent Hafnium Zirconium Superlattice Oxide in Silicon Gate-All-Around Field-Effect Logic Transistors    120
1 Motivation    120
2 Device Fabrication    121
3 Results and Discussion    123
3.1 Composition-Dependent Hafnium Zirconium Superlattice Oxide MIM Capacitors    123
3.1.1 Material Analysis    123
3.1.2 Electrical Analysis    125
3.2 Composition-Dependent Hafnium Zirconium Superlattice Oxide in Silicon Gate-All-Around Field-Effect Transistors    128
3.2.1 Material Analysis    128
3.2.2 Electrical Analysis    129
3.3 Interface Engineering of Composition-Dependent Hafnium Zirconium Superlattice Oxide Using Ammonia Plasma Treatment for Gate-All-Around Field-Effect Logic Transistors    130
3.3.1 Material Analysis    130
3.3.2 Electrical Analysis    130
4 Summary    132
Chapter 7  Comparison of Memory Devices with Different Channel Materials    133
1 Motivation    133
2 Device Fabrication    135
3 Results and Discussion    137
3.1 Material Analysis    137
3.2 Electrical Analysis    138
3.3 Reliability Analysis    141
4 Summary    144
Chapter 8  Study of N- and P- type Hafnium Zirconium Superlattice Ferroelectric Gate-All-Around Memory with Silicon-Germanium/Silicon Superlattice channel    145
1 Motivation    145
2 Device Fabrication    147
3 Results and Discussion    149
3.1 Material Analysis    149
3.2 Electrical Analysis    151
3.3 Reliability Analysis    155
4 Summary    158
Chapter 9  Conclusions and Recommendations for Future Work    159
1 Conclusions    159
2 Future Work    161
Reference    162
Curriculum Vitae    183
Publication List    184
Appendix    190

                                

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