研究生: |
陳永鴻 Chen, Yung-Hung |
---|---|
論文名稱: |
低頻低功率軌對軌差動運算放大器之雜訊改善積體電路設計 Noise Improvement of Low Frequency and Low Power Dissipation Rail-To-Rail Differential Inpup Operational Amplifier IC Design |
指導教授: |
龔正
Gong, Jeng 黃智方 Huang, Chin-Fang |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering |
論文出版年: | 2009 |
畢業學年度: | 97 |
語文別: | 中文 |
論文頁數: | 100 |
中文關鍵詞: | 低頻 、低功率 、雜訊改善 、軌對軌運算放大器 |
相關次數: | 點閱:3 下載:0 |
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在本篇論文中,利用TSMC 矽鍺0.35微米製程技術來設計應用於低頻操作的放大器,並且利用H-SPICE軟體對其進行模擬分析,此電路稱之為「低頻低功率軌對軌差動運算放大器之雜訊改善積體電路設計」。雜訊改善的方式是使用BiCMOS做為輸入級差動對的電路結構,以取代CMOS輸入級差動對的電路結構,然後透過設計出使用這兩種不同輸入級的運算放大器,並對其進行模擬分析與比較而得到本論文之研究結果。最後將其接成儀器放大器的電路架構,並再次進行模擬分析與比較而證實所設計出的運算放大器應用於儀器放大器上 亦能有改善雜訊的效果。另外,本論文內有提及所設計的電路可應用於醫療電子方面的心電圖(ECG)儀器上,並對ECG認識進行簡單之介紹。
In this work, TSMC SiGe0.35μm technology is used to design a low noise analog integrated circuit. This work is called 「Noise Improvement of Low-frequency , Low-power Rail-To-Rail Differential Input Op-Amp」, and is simulated by H-SPICE. It uses BiCMOS technology replacing CMOS technology in the differential input stage to improve noise in Op-Amp circuits. Through simulation and comparison, the results show that noise in the BiCMOS rail-to-rail differential input Op-Amp is better than noise in CMOS rail-to-rail differential input Op-Amp. Finally, rail-to-rail instrumentation Amps are integrated by these two kinds of Op-Amp, and then they are simulated and compared again. The simulation and comparison results show that noise is significantly improved when using BiCMOS rail-to-rail differential input Op-Amps. In addition, this paper mentions the designed rail-to-rail instrumentation Amps could be applied as ECG Amplifier in the medical electronic. This paper also introduces what is ECG and ECG related electronics.
[1]E. Allen and Douglas R. Holberg,“CMOS Analog Circuit Design”,Second Edition,OXFORD UNIVERSITY PRESS,2002.
[2]Razavi,“Design of Analog CMOS Integrated Circuits”,Mc Graw Hill,2002.
[3]Johan H. Huijsing,“OPERATIONAL AMPLIFIERS Theory and Design”,KLUWER ACADEMIC PUBLISHERS,2001.
[4]Murugavel Raju,“Heart-Rate and EKG Monitor Using the MSP430FG439”,TEXAS INSTRUMENTS Application Report,Publications Number SLAA28A-October 2005-Revised Sep. 2007.
[5]Xiyao Zhang,“A Design of ECG Amplifier,ECE 525 Project#1”,Sep. 2003.
[6]DailyCare BioMedical Inc,“http ://www.dcbiomed.com/material/ECG3CH.pdf”.
[7]W. Timothy Holman and J. Alvin Connelly,“A Compact Low Noise Operational Amplifier for a 1.2 pm Digital CMOS Technology”,IEEE Journal of Solid State Circuits,VOL.30,NO. 6,June 1995.
[8]JEAN-CLAUDE BERTAILS,“Low-Frequency Noise Considerations for MOS Amplifiers Design”,IEEE Journal of Solid State Circuits,VOL. SC-14,NO. 4,pp.773-776,Aug. 1979.
[9]Peter R.Kinget,“Device Mismatch and Tradeoffs in the Design of Analog Circuits”,IEEE Journal of Solid State Circuits,VOL. 40,NO. 6,June 2005.
[10]Patrick G.Drennan,“Device Mismatch in Bicmos Technologies”,IEEE BCTM 6.1,2002.
[11]Yung-Chih Liang,Meng-Lieh Sheu,Wei Hung Hsu,“A RAIL-TO-RAIL,CONSTANT GAIN CMOS OP-AMP”,The 2004 IEEE Asia-pacific on Circuits and Systems,Dec. 6-9,2004.
[12]Vijay Rentala,Saroj Rout,Edward Lee and Robert J. Weber,“A CONSTANT RAIL-TO-RAIL OPAMP WITH A NOVEL INPUT STAGE FOR BICMOS PROCESS”,IEEE,(I-224)-(I-227),2001.
[13]Minsheng Wang,Terry L. Mayhugh,Jr.,Sherif H. K. Embabi,and Edgar Sanchez-Sinencio,“Constant- Rail-to-Rail CMOS OP-AMP Input Stage with Overlapped Transition Regions”, IEEE Journal of Solid State Circuits,VOL. 34,NO. 2,Feb. 1999.
[14]R.Hogervorst et.al.,“A Compact Power-Efficient 3V CMOS Rail-to-Rail Input/Output Operational Amplifier for VLSI Cell Libraries”,IEEE Journal of Solid State Circuits,SC-29(12):1505-1513,Dec. 1994.
[15]Juan M.Carrillo,Jose L.Ausim,J. Francisco Duque-Carrillo and Guido Torelli,“Constant- Constant-Slew Rate High-Bandwith Low-Voltage Rail-to-Rail CMOS
Input Stage for VLSI Cell Libraries”,IEEE Journal of Solid State Circuits,VOL. 38,pp.1364-1372 ,Aug. 2003.
[16]J. Ramirez-Angulo,R. G. Carvajal,J. Tombs and A.Torralba,“Low-Voltage CMOS Op-Amp with Rail-to-Rail Input and Output Signal Swing for Continuous-Time Signal Processing Using Multiple-Input Floating-Gate Transistors”,IEEE Trans. Circuits Syst. Ⅱ,VOL. 48,pp.111-116,Jan. 2001.
[17]Timothy Wayne Fischer,Aydm Ilker Karsilayan and Edgar Sanchez-Sinencio,“A Rail-to-Rail Amplifier Input Stage With ± 0.35% Fluctuation”,IEEE Trans.Circuits Syst. Ⅰ,VOL. 52,pp.271-282,Feb. 2005.
[18]Vadim Ivanov and Shilong Zhang,“250 MHz CMOS rail-to-rail IO OpAmp: Structural Design Approach”,European Solid State Circuits Conference,pp.183-186,2002.
[19]Franco Fiori and Paolo Stefano Crovetti,“A New Compact Temperature –Compensated CMOS Current Reference”,IEEE TRANSACTIONS ON CIRCUITS
AND SYSTEMS-II:EXPRESS BRIEFS,VOL. 52,NO. 11,November 2005.
[20]INA326、INA327,“Precision,Rail-to-Rail I/O INSTRUMENTATION AMPLIFIER”,Burr-Brown Products from TEXAS INSTRUMENTS,Publications Number SBOS222D-Nov. 2001-Revised Nov. 2004.