隨著半導體技術的高度發展，SOC設計已經變成目前電子系統的主流，因此，SOC設計的驗證工作是非常重要的。在SOC驗證工作的主要問題其中之一就是去驗證是否一個區塊在它預期的環境中可以正常的工作，而許多以交易行為為基礎的驗證方式已經被提出來解決這個問題，它們允許使用者可以很輕易的製造及撰寫測試平台，此外在交易階層進行介面設計的驗證是非常有效率的。之前的方法是針對一個晶片匯流排手動地製造抽取器，然後需要其他額外的負擔來對於其他的晶片匯流排製造抽取器，在本論文中，我們提出了一個以語言為基礎的方法在交易階層來描述匯流排的行為模式，然後，在匯流排上的訊號將會被抽取成高階的交易行為，這些交易行為將會被用來進行驗證的工作。同樣地，這些對應的交易行為抽取器將會自動的被產生，而這些被以交易行為模式所呈現出來的匯流排交易行為將替驗證工程師大幅減少驗證工作時所花費的代價，而我們已經在AMBA AHB以及Sonic’s OCP上證明了我們的方法是可行的。

With the increasing in silicon densities, SoC designs are the stream in modern electronics systems. Accordingly, the verification for SoC designs is crucial. One of the main problems in SoC verification is to verify whether the interface of a block works properly in its intended
system. Transaction-based verification methodologies have been proposed to deal with this problem, and they allow users creating tests and writing test benches more easily. Furthermore, verifying interface designs in transaction level is very efficient. Previous work creates extractor
manually for one on-chip bus (OCB), and the extra efforts are needed for another OCBs. In this work, we present a language-based methodology to specify the bus behaviors in transaction level. Then the actual signals on the buses can be extracted to the high level transactions for verification. The corresponding transaction extractors are automatically generated as well. The bus behaviors displayed in transaction level significantly reduce the verification efforts for verification engineers. We demonstrate the success of our approach on AMBA AHB and Sonics’OCP buses.

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