本研究中我們將採CMOS(Complementary Metal Oxide Semiconductors)積體電路製程為製作平台，以結合CMOS感測電路及巨磁阻感測器。在此設計,我們先確定了系統的架構，再接著去設計出所需的放大器，用HSpice去模擬電路能否如預期般操作，將電路系統整合後，進行全系統模擬，確保電路在實際上能夠正常工作。在後製程上，我們利用之前在晶片上已劃好之的aligner key，使用電子束微影技術定義出我們所要的圖案，再去進行巨磁阻的lift-off。之後再將兩者結合做電性的量測。
本論文將介紹感測電路的設計概念及製作過程，並探討實驗過程中所遇到的問題。

The present study is aimed to design a giant magnetoresistive (GMR) sensors based on CMOS(Complementary Metal Oxide Semiconductors) technologies. The main focus is on how to achieve a higher sensitivity .
In this design, we first make sure the architecture of the system. then we design the amplifier and use Hspice to verify the result .The giant magnetoresistive sensor is patterned by electron-beam lithography , and a sputtering system is used for deposition before lift-off.
In this paper, we present the concept of the sensor circuit and the fabricated process,then discuss the problem we have encountered during the experiment.

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