我們利用實驗室成員所提出的平台式 (Platform-Based ) 系統單晶片(System-on-Chip, SOC) 設計流程以及矽智產(Silicon Intellectual Property, SIP) 設計和整合方法 (Integration methodology)，以軟硬體共同設計的方式完成一個JPEG2000編碼器。我們特別著重在硬體加速器部份和中央處理器 (CPU) 內軟體部份的同時執行 (concurrent execution) 規劃上。在我們採用的可程式化系統單晶片平台上，JPEG2000以離散小波轉換 (Discrete Wavelet Transform, DWT) 和區塊編碼 (Embedded Block Coding with Optimized Truncation, EBCOT) 硬體加速器等循序執行加速後，和 JPEG2000 以純軟體方式執行的時間相比較，約可減少 70% 的執行時間。而利用我們所提出的同時執行規劃，我們可以更進一步地縮短約 14% 的執行時間。在此，我們將在所提出的系統上，敘述我們的實作經驗。

We implement a JPEG2000 encoder based on an internally developed hardware/software codesign methodology. We emphasize on the concurrent execution of hardware accelerator IPs and software running on the CPU. In a programmable SOC platform, hardware acceleration of DWT and EBCOT Tier-1 sequentially gives us 70% reduction in total execution time. The proposed concurrent scheme achieves additional 14% saving. We describe our experience in bringing up such a system.

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