鉿金屬氧化物閘介電層金氧半元件之電性與可靠度特性研究

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研究生：	鄭錦隆 Chin-Lung Cheng
論文名稱：	鉿金屬氧化物閘介電層金氧半元件之電性與可靠度特性研究 Electrical and Reliability Characteristics of MOS Devices with HfOxNy as Gate Dielectrics
指導教授：	張廖貴術 Kuei-Shu Chang-Liao
口試委員:
學位類別：	博士 Doctor
系所名稱：	原子科學院 - 工程與系統科學系 Department of Engineering and System Science
論文出版年：	2005
畢業學年度：	93
語文別：	中文
論文頁數：	118
中文關鍵詞：	鉿金屬氧化物、金氧半元件、電性、可靠度特性、高介電係數、化學分析電子儀、穿隧漏電流、界面陷阱
外文關鍵詞：	HfOxNy, MOS device, electrical property, reliability characteristics, High-k, XPS, tunneling leakage current, interface trap
相關次數：	點閱：3 下載：0
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由於MOS元件二氧化矽閘介電層厚度縮小化，促使電晶體的性能得以提昇。然而，隨著二氧化矽閘介電層厚度的減少，使得漏電流快速的增加，導致元件應用在IC的嚴重問題，因此運用高介電係數閘介電層來解決漏電流問題是金氧半元件製程中的關鍵課題。目前，在各種高介電係數閘極介電層中，以金屬鉿(Hafnium)為基底的氧化物被高度的受重視。本研究發現，在介電層與矽界面置入高量的氮可以改善元件的電與可靠度特性，這是由於高量的氮可降低界面的應變及缺陷產生率。相反地，在本體介電層中含太多氮反而會有電荷補捉現象發生。再者，根據化學分析電子儀(XPS)的分析，氮氧化鉿(HfOxNy)沉積在矽(111)晶格面上會比沉積在矽(100)晶格面上，在界面會有較多的氮原子及較低的氧原子，且擁有較佳的可靠度。在氮氧化鉿(HfOxNy)介電層的漏電流機制方面，研究發現在低溫及高電場是由穿隧(tunneling)電流例如場發射(field emission)支配，在高溫低電場發現是蕭基(Schottky emission)支配，而在高溫及高電場反而是 Frenkel-Poole emission。同時利用在不同溫度的漏電流量測，可以決定陷阱能量的深度。在減低界面缺陷方面，可以利用高溫退火處理矽基板來提昇元件的電特性及降低界面陷阱(interface trap)情形。高溫熱退火處理後，可以降低靠近矽表面的缺陷，一旦界面的缺陷降低，則有利高介電係數閘極介電層沉積後的元件特性，這是由於利用沉積的方法來形成高介電係數閘極介電層，其界面缺陷常常造成高漏電流。同時研究發現利用化學乾式清洗矽晶表面可以使得蝕刻表面的平整性改善及降低表面的污染，進一步的改善元件的漏電流、閘介電層崩潰時間、介面粗糙度及理想因子特性。

The continuous scaling down of gate silicon dioxide thickness in metal-oxide-semiconductor devices achieves continued improvement in integrated circuit performance. However, the accompanying high leakage current of ultrathin silicon oxide is a significant problem for IC application. A high-k gate dielectric with a large physical thickness and an identical equivalent oxide thickness has recently been proposed to solve this leakage issue. Among various high-k gate dielectrics, Hf-based gate dielectrics have received much attention. Properties with better reliability can be obtained by higher nitrogen pile-up at the dielectric/Si interfaces. More nitrogen incorporated into gate dielectric bulk can result in more significant charge trapping. A greater amount of nitrogen incorporated into the dielectric/Si interface can result in less strain near the interface and a smaller defect generation rate. In addition, the XPS results show that the O 1s peak for the Si(111)-substrate sample is lower than that for the Si(100)-substrate sample while the N 1s peak is higher for the former than for the latter. Crystalline retardation was found to be significant for the HfOxNy film deposited onto the Si(111)-substrate as characterized by XRD. According to the investigations upon SILC and Tbd, the reliability characteristics of high-k gate dielectrics deposited on a Si(111)-substrate are better than those deposited on a Si(100)-substrate. The current-conduction mechanism of the HfOxNy film at low-temperature range and high-field, the low-electrical field and high-temperature, the high-electrical field and high-temperature is dominated by tunneling, Schottky emission and Frenkel-Poole emission, respectively. The trap energy level involved in FP conduction was estimated. A low defect (denuded zone) at Si surface was formed by a high-temperature annealing. Our results reveal that HfOxNy demonstrates a significant improvement on the electrical properties of MOS devices owing to its low amount of the [Oi] and the crystal-originated particles defects and better surface quality at the IL/Si interface. Moreover, after plasma etching, a chemical dry clean treatment was applied to achieve a smoother surface and to reduce carbon and fluorine residues contamination. Based on the investigations upon leakage current, stress induced leakage current, time to breakdown, interface roughness, and ideality factor, chemical dry clean treatment has shown to be an effective process to improve electrical and reliability characteristics of high-k MOS devices.

Abstract (in English)……………………………………    I
Abstract (in Chinese)……………………………………    III
Acknowledgment……………………………………………    IV
Contents……………………………………………………    V
Table Captions……………………………………………    VIII
Figure Captions……………………………………………    IX

Chapter 1
Introduction____________________________________    1
1    General Background……………………………      1
1.1  Hafnium-based High-k Gate Dielectric
1.2  The Roles of Nitrogen in High-k Gate Dielectric
1.3  The Effects of Interface Engineering on High-k Gate Dielectric
2    Carrier Transport in High-k Gate Dielectrics… 4
2.1  Schottky Emission (SE)
2.2  Frenkel-Poole Emission (FP)
2.3  Fowler-Nordheim Tunneling (F-N)
3    Outline of this thesis ………………………………6

Chapter 2
Experiments and Measurements __________________________ 12
1    The Process Flow ………………………………………12
1.1    MOS Capacitors
1.2    N+/P Junction Diodes
2    Material Analysis Methods …………………………15
2.1    Secondary Ion Mass Spectroscopy (SIMS)
2.2    X-ray Photoelectron Spectroscopy (XPS)
2.3    X-ray Diffraction (XRD)
2.4    Fourier-Transform Infrared Spectroscopy (FTIR)
2.5    Scanning Electron Microscope (SEM)
2.6    Atomic Force Microscopy (AFM)
3    Electrical Characterization Methods ………………18
3.1    Capacitance Equivalent Thickness (CET) and Equivalent Oxide Thickness (EOT)
3.2    Stress-Induced Leakage Current (SILC)
3.3    The Defect Generation Rate
3.4    Oxide Integrity
3.5    Bipolar-Pulse-Induced Current (BPIC) Technique

Chapter 3
Effects of Nitrogen Profiles in HfOxNy Gate Dielectric on Electrical and Reliability Characteristics of MOS Devices _______________________________________________________24
1    Introduction ………………………………………… 24
2    Fabrication of MOS Devices ……………………… 26
3    Results and Discussions …………………………  26
3.1    Various Nitrogen Concentration Profiles at HfOxNy/Si Interface Effects
3.2    Bulk Nitrogen in HfOxNy Gate Dielectric Effects
4    Summary …………………………………………………31

Chapter 4
Various Surface-Oriented and High-Temperature Annealed Substrates on Electrical Characteristics of MOS Devices with HfOxNy Gate Dielectrics __________________________47
1  Introduction ……………………………………………… 47
2  Fabrication of MOS Devices…. ………………………  49
3  Results and Discussions ………………………………  51
3.1  HfOxNy Gate Dielectrics deposited on (111)- and (100)-Surface-Oriented Si Substrates Effects
3.2  Denuded Zone of (111)-Surface-Oriented Si Substrate Formed by Rapid Thermal/Furnace Annealing in Nitrogen Effects
3.3  Denuded Zone of (100)-Surface-Oriented Si Substrate Formed by Furnace Annealing in Hydrogen Effects
4  Summary …………………………………………………………62

Chapter 5
Improved Electrical and Surface Characteristics of MOS Devices with Gate Hafnium Oxynitride by Chemical Dry Etching _________________________________________________90
1  Introduction ………………………………………………… 90
2  Fabrication of MOS Devices …..….……………………  92
3  Results and Discussions …………………………………  93
3.1  Electrical and Reliability Characteristics of MOS Devices
3.2  Electrical Characteristics of N+/P Junction Diode with Etching Effect of High-k Gate Dielectric
3.3  Surface Properties of TaN/HfOxNy/Si Capacitors and N+/P Junction Diode
4  Summary ………………………………………………………… 97

Chapter 6
Conclusions and Suggestions ____________________________104
1  Conclusions ………………………………………………… 104
2  Suggestions on Future Work ……………………………  106

Reference _____________________________________________ 108

                                

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