近年來，隨著記憶體元件的不斷微縮，電荷缺陷儲存式快閃記憶體(CTF NVM)元件的耐久性和資料保存能力已面臨挑戰。具備三維整合能力的新型電阻式隨機存取記憶體已被視為最具發展潛力的下一世代非揮發式記憶體，然而，過大的通道形成導通電壓、高操作電流、阻態切換穩定性差，以及不良的週期耐久性仍是目前遭遇的議題。本論文將以鍺氧化物材料(GeOx)的電阻切換特性為研究主軸，整合多種金屬氧化物，材料包含氮氧化鉿(HfON)、氮氧化鉭(TaON)、二氧化鈦(TiO2)、以及鈦酸鍶氧化物(SrTiO)等，以形成雙層以上堆疊結構，並同步進行材料物性和化性分析，進而實現一系列低功率且高速操作的電阻式記憶體元件。此系列低功率電阻式記憶體具有大的電阻值比(HRS/LRS ratio)、良好的資料保存能力、100 ns以下的操作速度，和10萬次以上週期耐久性。經由我們初步研究結果證實，這些低功率電阻式記憶體元件，其阻態切換電流的降低和自我限流功能(self-compliance)，是由躍遷傳導機制(hopping conduction)所主導。然而，由於阻態切換機制複雜，對於多層堆疊結構的電阻式記憶體而言，相對應的傳導機制仍有待更多研究來釐清。
本論文首先探討雙層式鍺氧化物/鈦酸鍶(GeO/STO)電阻式記憶體，由研究結果可知，此元件操作所需的設置(set)功率為4 uW，重置(reset)功率僅16 pW，且同時具備高速操作能力(50 ns)、良好的資料保存能力(85C)，以及十萬次的重覆讀寫次數等。然而，為了更進一步降低操作電流以及改善鈦酸鍶氧空缺層的穩定性，我們使用氮氧化鉿取代窄能帶鈦酸鍶氧化物。此雙層式鍺氧化物/氮氧化鉿(GeO/HfON)電阻式記憶體元件除了展示1 W以下的低操作功率，以及8 fJ的阻態切換能量外，更擁有較佳的高溫資料保存能力(125C)。此外，這高性能的雙層式鍺氧化物/氮氧化鉿(GeO/HfON)電阻式記憶體架構也成功的以低溫製程技術，製作於軟性基板(聚亞醯胺基板)上。此可撓式電阻式記憶體元件，可在50 ns速度下操作，設置功率為4.8 uW，重置功率更降低至1 nW，是目前發表之可撓性電阻式記憶體元件中，操作功率最低的，且該元件讀寫操作次數更可達到上萬次。另外，為了改善元件的阻態切換穩定性和週期耐久性等特性，我們開發了三層式電阻式記憶體，藉由鍺氧化物、奈米結晶相二氧化鈦和氮氧化鉭三種材料的相互結合，成功實現了一個超長週期耐久性的高速電阻式記憶體元件。此三層堆疊型電阻式記憶體元件的操作能量僅需0.7 pJ，且具備10 ns高速阻態切換能力、自我限流功能的低阻態切換電流(~uA)，以及優異高低阻態切換穩定度(excellent switching uniformity)。另外值得注意的是，元件讀寫次數已由原本的十的六次方，提升至十的十次方次。此新型低功率電阻式記憶體元件，與現行快閃記憶體元件的耐久性相比較下，讀寫次數高了五個數量級。

Although novel resistive random access memory (RRAM) with 3D integration shows high potential for down scaling beyond charge-trapping flash (CTF) nonvolatile memory (NVM) at sub-25 nm nodes, the large forming voltage, high set/reset currents, poor switching uniformity and low cycling endurance are other challenges. In this dissertation, it is demonstrated ultra-low power nonvolatile RRAM devices with superior memory characteristics can be achieved by using stacked metal-insulator-metal (MIM) structures with covalent-bond germanium oxide (GeOx) and oxygen-deficient metal oxides (e.g., HfON, TaON, SrTiO3, TiO2).
These low-power RRAM devices show excellent resistance switching characteristics such as large high- to low-resistance state (HRS/LRS) ratio of >100X, good data retention, fast speed of <100 ns and cycling endurance of >10^6 cycles. Our studies reveal that hopping conduction mechanism in LRS provides a large internal resistance to reach low self-compliance switching set/reset currents. Using novel stacked GeOx on metal-oxide SrTiO3 to form the cost-effective Ni/GeO/SrTiO/TaN resistive switching memory, low set power of small 4 uW, reset power of 16 pW, good data retention at 85C, fast 50 ns switching time and good 106 cycling endurance are realized. Another technique used for further saving power is to employ HfON to replace of narrow-bandgap SrTiO3, which can lower set power to sub-uW and reach ultra-low 8 fJ switching energy. The improved 125C retention than previous GeOx/SrTiO3 RRAM can be ascribed to higher activation energy to maintain stable resistance state under high-temperature retention test.
Furthermore, the high performance GeOx/HfON RRAM has been demonstrated on low-cost Polyimide substrate. Only very low set poer of 4.8 uW and reset power of 1 nW are needed to reach bi-stable resistance state, which lead to a large memory window with HRS/LRS ratio of 9x10^2. Also, good retention of 85C for 10^4 sec and excellent endurance of 10^5 cycles at a fast 50 ns are obtained simutaneously. To further imporve switching stability and cycling endurance, we propose a tri-layer RRAM using nano-crystal TiO2 and TaON buffer layer, the Ni/GeOx/nc-TiO2/TaON/TaN RRAM shows the self-compliance set/reset currents, low 0.7-pJ switching energy, narrow current distribution and long 10^10 cycling endurance. Such long endurance is 5 orders of magnitude higher than the existing Flash memory at the close sub-pJ switching energy.

References
Chapter 1:
[1.1] International Technology Roadmap for Semiconductors (ITRS), 2010. [Online]. Available: www.itrs.net
[1.2] S. H. Lin, Albert Chin, F. S. Yeh, and S. P. McAlister, “Good 150oC retention and fast erase charge-trapping-engineered memory with scaled Si3N4,” in IEDM Tech. Dig., 2008, pp. 843-846.
[1.3] C. H. Lai, Albert Chin, H. L. Kao, K. M. Chen, M. Hong, J. Kwo and C. C. Chi, “Very Low Voltage SiO2/HfON/HfAlO/TaN Memory with Fast Speed and Good Retention,” in Symp. on VLSI Tech. Dig., 2006, pp. 54-55.
[1.4] U. Russo, D. Ielmini, C. Cagli, A. L. Lacaita, S. Spiga, C. Wiemer, M. Perego, and M. Fanciulli, “Conductive-filament switching analysis and self-accelerated thermal dissolution model for reset in NiO-based RRAM,” in IEDM Tech. Dig., 2007, pp. 775-778.
[1.5] H. S. Yoon, I. G. Baek, J. Zhao, H. Sim, M. Y. Park, H. Lee, G. H. Oh, J. C. Shin, I. S. Yeo and U. I. Chung, “Vertical cross-point resistance change memory for ultra-high density non-volatile memory applications,” in Symp. on VLSI Tech. Dig., 2009, pp. 26-27.
[1.6] X. Sun, B. Sun, L. Liu, N. Xu, X. Liu, R. Han, J. Kang, G. Xiong and T. P. Ma, “Resistive switching in CeOx films for nonvolatile memory application,” IEEE Electron Device Lett., vol. 30, pp. 334-336, April 2009.
[1.7] Q. Liu, S. Long, W. Wang, Q. Zuo, S. Zhang, J. Chen and M. Liu, “Improvement of resistive switching properties in ZrO2-based ReRAM with implanted Ions,” IEEE Electron Device Lett., vol. 30, pp. 1335-1337, Dec. 2009.
[1.8] H. Sim, H. Choi, D. Lee, M. Chang, D. Choi, Y. Son, E. Lee, W. Kim, Y. Park, I. Yoo, and H. Hwang, “Excellent resistance switching characteristics of Pt/SrTiO3 Schottky junction for multi-bit nonvolatile memory application,” in IEDM Tech. Dig., 2005, pp. 777-780.
[1.9] D. Lee, D. J. Seong, H. J. Choi, I. Jo, R. Dong, W. Xiang, S. Oh, M. Pyun, S. O. Seo, S. Heo, M. Jo, D. K. Hwang, H. K. Park, M. Chang, M. Hasan and H. Hwang, “Excellent uniformity and reproducible resistance switching characteristics of doped binary metal oxides for non-volatile resistance memory applications,” in IEDM Tech. Dig., 2006, pp. 797-800.
[1.10] D. J. Seong, J. Park, N. Lee, M. Hasan, S. Jung, H. Choi, J. Lee, M. Jo, W. Lee, S. Park, S. Kim, Y. H. Jang, Y. Lee, M. Sung, D. Kil, Y. Hwang, S. Chung, J. Roh, and H. Hwang, “Effect of oxygen migration and interface engineering on resistance switching behavior of reactive metal/polycrystalline Pr0.7Ca0.3MnO3 device for nonvolatile memory applications,” in IEDM Tech. Dig., 2009, pp. 101-104.
[1.11] B. Gao, B. Sun, H. Zhang, L. Liu, X. Liu, R. Han, J. Kang and B. Yu, “Unified physical model of bipolar oxide-based resistive switching memory,” IEEE Electron Device Lett., vol. 30, pp. 1326-1328, Dec. 2009.
[1.12] N. Xu, B. Gao, L. F. Liu, Bing Sun, X. Y. Liu, R. Q. Han, J. F. Kang, and B. Yu, “A unified physical model of switching behavior in oxide-based RRAM,” in VLSI Symp. Tech. Dig., 2008, pp. 100-101.
[1.13] G. H. Buh, I. Hwang and B. H. Park, “Time-dependent electroforming in NiO resistive switching devices,” Appl. Phys. Lett., vol. 95, p. 142101, Oct. 2009.
[1.14] M. F. Chang, P. T. Lee, S. P. McAlister and Albert Chin, “A flexible organic pentacene nonvolatile memory based on high-k dielectric layers,” Appl. Phys. Lett., vol. 93, p. 233302, Dec. 2008.
[1.15] N. C. Su, S. J. Wang and Albert Chin, “A nonvolatile InGaZnO charge-trapping-engineered flash memory with good retention characteristics,” IEEE Electron Device Lett., vol. 31, pp. 201-203, Feb. 2010.

Chapter 2:
[2.1] M. J. Lee, C. B. Lee, S. Kim, H. Yin, J. Park, S. E. Ahn, B. S. Kang, K. H. Kim, G. Stefanovich, I. Song, S. W. Kim, J. H. Lee, S. J. Chung, Y. H. Kim, C. S. Lee, J. B. Park, I. G. Baek, C. J. Kim, Y. Park, “Stack friendly all-oxide 3D RRAM using GaInZnO peripheral TFT realized over glass substrates,” in IEDM Tech. Dig., 2008, pp. 85-88.
[2.2] C. Schindler, S. C. P. Thermadam, R. Waser and M. N. Kozicki, “Bipolar and unipolar resistive switching in Cu-doped SiO2,” IEEE Trans. Electron Devices, vol. 54, pp. 2762–2768, Oct. 2007.
[2.3] R. Waser and M. Aono, “Nanoionics-based resistive switching memories,” Nat. Mater., vol. 6, pp. 833-840, Nov. 2007.
[2.4] S. H. Jo and W. Lu, “CMOS compatible nanoscale nonvolatile resistance switching memory,” Nano. Lett., vol. 8, pp. 392-397, Jan. 2008.
[2.5] D. B. Strukov, G. S. Snider, D. R. Stewart and R. S. Williams, “The missing memristor found,” Nature, vol. 453, pp. 80-83, May 2008.
[2.6] J. J. Yang, M. D. Pickett, X. Li, D. A. A. Ohlberg, D. R. Stewart and R. S. Williams, “Memristive switching mechanism for metal/oxide/metal nanodevices,” Nat. Nanotechnol., vol. 3, pp. 429-433, July 2008.
[2.7] T. Fujii, M. Kawasaki, A. Sawa, H. Akoh, Y. Kawazoe, and Y. Tokura, “Hysteretic current-voltage characteristics and resistance switching at an epitaxial oxide Schottky junction SrRuO3/SrTi0.99Nb0.01O3,” Appl. Phys. Lett., vol. 86, p. 012107, Dec. 2004.
[2.8] M. Jo, D. J. Seong, S. Kim, J. Lee, W. Lee, J. B. Park, S. Park, S. Jung, J. Shin, D. Lee and H. Hwang, “Novel cross-point resistive switching memory with self-formed Schottky barrier,” in Symp. on VLSI Tech. Dig., 2010, pp. 53-54.
[2.9] G. H. Buh, I. Hwang and B. H. Park, “Characteristics and mechanism of conduction/set process in TiN/ZnO/Pt resistance switching random-access memories,” Appl. Phys. Lett., vol. 92, p. 232112, June 2008.
[2.10] S. H. Chang, S. C. Chae, S. B. Lee, C. Liu, T. W. Noh et al., “Effects of heat dissipation on unipolar resistance switching in Pt/NiO/Pt capacitors,” Appl. Phys. Lett., vol. 92, p. 183507, May 2008.
[2.11] U. Russo, D. Ielmini, C. Cagli and A. L. Lacaita, “Self-accelerated thermal dissolution model for reset programming in unipolar resistive-switching memory (RRAM) devices,” IEEE Trans. Electron Devices, vol. 56, pp. 193–200, Feb. 2009.

Chapter 3:
[3-1] International Technology Roadmap for Semiconductors (ITRS), 2010. [Online]. Available: www.itrs.net
[3-2] S. H. Lin, Albert Chin, F. S. Yeh, and S. P. McAlister, “Good 150oC retention and fast erase charge-trapping-engineered memory with scaled Si3N4,” in IEDM Tech. Dig., 2008, pp. 843-846.
[3-3] U. Russo, D. Ielmini, C. Cagli, A. L. Lacaita, S. Spiga, C. Wiemer, M. Perego, and M. Fanciulli, “Conductive-filament switching analysis and self-accelerated thermal dissolution model for reset in NiO-based RRAM,” in IEDM Tech. Dig., 2007, pp. 775-778.
[3-4] H. S. Yoon, I. G. Baek, J. Zhao, H. Sim, M. Y. Park, H. Lee, G. H. Oh, J. C. Shin, I. S. Yeo and U. I. Chung, “Vertical cross-point resistance change memory for ultra-high density non-volatile memory applications,” in Symp. on VLSI Tech. Dig., 2009, pp. 26-27.
[3-5] H. Y. Lee, P. S. Chen, T. Y. Wu, C. C. Wang, P. J. Tzeng, C. H. Lin, F. Chen, M. J. Tsai and C. Lien, “Electrical evidence of unstable anodic interface in Ru/HfOx/TiN unipolar resistive memory,” Appl. Phys. Lett. vol. 92, p. 142911, April 2008.
[3-6] Q. Liu, S. Long, W. Wang, Q. Zuo, S. Zhang, J. Chen and M. Liu, “Improvement of resistive switching properties in ZrO2-based ReRAM with implanted Ions,” IEEE Electron Device Lett., vol. 30, pp. 1335-1337, Dec. 2009.
[3-7] N. Xu, B. Gao, L. F. Liu, Bing Sun, X. Y. Liu, R. Q. Han, J. F. Kang, and B. Yu, “A unified physical model of switching behavior in oxide-based RRAM,” in VLSI Symp. Tech. Dig., 2008, pp. 100-101.
[3-8] X. Sun, B. Sun, L. Liu, N. Xu, X. Liu, R. Han, J. Kang, G. Xiong and T. P. Ma, “Resistive switching in CeOx films for nonvolatile memory application,” IEEE Electron Device Lett., vol. 30, pp. 334-336, April 2009.
[3-9] W. C. Chen, Y. C. Chen, E. K. Lai, Y. D. Yao, P. Lin, S. F. Horng, J. Gong, T. H. Chou, H. M. Lin, M. N. Chang, Y. H. Shih, K. Y. Hsieh, R. Liu, and C. Y. Lu, “Unipolar switching behaviors of RTO WOx RRAM,” IEEE Electron Device Lett., vol. 31, pp. 126-128, Feb. 2010.
[3-10] D. Lee, D. J. Seong, H. J. Choi, I. Jo, R. Dong, W. Xiang, S. Oh, M. Pyun, S. O. Seo, S. Heo, M. Jo, D. K. Hwang, H. K. Park, M. Chang, M. Hasan and H. Hwang, “Excellent uniformity and reproducible resistance switching characteristics of doped binary metal oxides for non-volatile resistance memory applications,” in IEDM Tech. Dig., 2006, pp. 797-800.
[3-11] H. Sim, H. Choi, D. Lee, M. Chang, D. Choi, Y. Son, E. Lee, W. Kim, Y. Park, I. Yoo, and H. Hwang, “Excellent resistance switching characteristics of Pt/SrTiO3 Schottky junction for multi-bit nonvolatile memory application,” in IEDM Tech. Dig., 2005, pp. 777-780.
[3-12] K. C. Chiang, C. H. Cheng, H. C. Pan, C. N. Hsiao, C. P. Chou, Albert Chin and H. L. Hwang, “High-temperature leakage improvement in metal-insulator-metal capacitors by work-function tuning,” IEEE Electron Device Lett., vol. 28, no. 3, pp. 235-237, Mar. 2007.
[3-13] J. H. Hur, K. M. Kim, M. Chang, S. R. Lee, D. Lee, C. B. Lee, M. J. Lee, Y. B. Kim, C. J. Kim and U. I. Chung, “Modeling for multilevel switching in oxide-based bipolar resistive memory,” Nanotechnology, vol. 23, pp. 225702, April 2012.
[3-14] H. L. Gomes, A. R V. Benvenho, D. M. de Leeuw, M. Colle, P. Stallinga, F. Verbakel and D. M. Taylor, “Switching in polymeric resistance random-access memories (RRAMS),” Org. Electron, vol. 9, pp. 119-128, Feb. 2008.
[3-15] A. Chin, K. Lee, B. C. Lin, and S. Horng, “Picosecond photoresponse of carriers in Si ion-implanted Si,” Appl. Phys. Lett. vol. 69, pp. 653-655, May 1996.

Chapter 4:
[4.1] International Technology Roadmap for Semiconductors (ITRS), 2010. [Online]. Available: www.itrs.net
[4.2] S. H. Lin, Albert Chin, F. S. Yeh, and S. P. McAlister, “Good 150oC retention and fast erase charge-trapping-engineered memory with scaled Si3N4,” in IEDM Tech. Dig., 2008, pp. 843-846.
[4.3] U. Russo, D. Ielmini, C. Cagli, A. L. Lacaita, S. Spiga, C. Wiemer, M. Perego, and M. Fanciulli, “Conductive-filament switching analysis and self-accelerated thermal dissolution model for reset in NiO-based RRAM,” in IEDM Tech. Dig., 2007, pp. 775-778.
[4.4] H. S. Yoon, I. G. Baek, J. Zhao, H. Sim, M. Y. Park, H. Lee, G. H. Oh, J. C. Shin, I. S. Yeo and U. I. Chung, “Vertical cross-point resistance change memory for ultra-high density non-volatile memory applications,” in Symp. on VLSI Tech. Dig., 2009, pp. 26-27.
[4.5] X. Sun, B. Sun, L. Liu, N. Xu, X. Liu, R. Han, J. Kang, G. Xiong and T. P. Ma, “Resistive switching in CeOx films for nonvolatile memory application,” IEEE Electron Device Lett., vol. 30, pp. 334-336, April 2009.
[4.6] Q. Liu, S. Long, W. Wang, Q. Zuo, S. Zhang, J. Chen and M. Liu, “Improvement of resistive switching properties in ZrO2-based ReRAM with implanted Ions,” IEEE Electron Device Lett., vol. 30, pp. 1335-1337, Dec. 2009.
[4.7] H. Sim, H. Choi, D. Lee, M. Chang, D. Choi, Y. Son, E. Lee, W. Kim, Y. Park, I. Yoo, and H. Hwang, “Excellent resistance switching characteristics of Pt/SrTiO3 Schottky junction for multi-bit nonvolatile memory application,” in IEDM Tech. Dig., 2005, pp. 777-780.
[4.8] D. Lee, D. J. Seong, H. J. Choi, I. Jo, R. Dong, W. Xiang, S. Oh, M. Pyun, S. O. Seo, S. Heo, M. Jo, D. K. Hwang, H. K. Park, M. Chang, M. Hasan and H. Hwang, “Excellent uniformity and reproducible resistance switching characteristics of doped binary metal oxides for non-volatile resistance memory applications,” in IEDM Tech. Dig., 2006, pp. 797-800.
[4.9] D. J. Seong, J. Park, N. Lee, M. Hasan, S. Jung, H. Choi, J. Lee, M. Jo, W. Lee, S. Park, S. Kim, Y. H. Jang, Y. Lee, M. Sung, D. Kil, Y. Hwang, S. Chung, J. Roh, and H. Hwang, “Effect of oxygen migration and interface engineering on resistance switching behavior of reactive metal/polycrystalline Pr0.7Ca0.3MnO3 device for nonvolatile memory applications,” in IEDM Tech. Dig., 2009, pp. 101-104.
[4.10] B. Gao, B. Sun, H. Zhang, L. Liu, X. Liu, R. Han, J. Kang and B. Yu, “Unified physical model of bipolar oxide-based resistive switching memory,” IEEE Electron Device Lett., vol. 30, pp. 1326-1328, Dec. 2009.
[4.11] N. Xu, B. Gao, L. F. Liu, Bing Sun, X. Y. Liu, R. Q. Han, J. F. Kang, and B. Yu, “A unified physical model of switching behavior in oxide-based RRAM,” in VLSI Symp. Tech. Dig., 2008, pp. 100-101.
[4.12] W. C. Chen, Y. C. Chen, E. K. Lai, Y. D. Yao, P. Lin, S. F. Horng, J. Gong, T. H. Chou, H. M. Lin, M. N. Chang, Y. H. Shih, K. Y. Hsieh, R. Liu, and C. Y. Lu, “Unipolar switching behaviors of RTO WOx RRAM,” IEEE Electron Device Lett., vol. 31, pp. 126-128, Feb. 2010.
[4.13] D. Choi, D. Lee, H. Sim, M. Chang, and H. Hwang, “Reversible resistive switching of SrTiOx thin films for nonvolatile memory applications,” Appl. Phys. Lett., vol. 88, p. 082904, Feb. 2006.
[4.14] K. C. Chiang, C. H. Cheng, H. C. Pan, C. N. Hsiao, C. P. Chou, Albert Chin and H. L. Hwang, “High-temperature leakage improvement in metal-insulator-metal capacitors by work-function tuning,” IEEE Electron Device Lett., vol. 28, no. 3, pp. 235-237, Mar. 2007.
[4.15] A. Chin, K. Lee, B. C. Lin, and S. Horng, “Picosecond photoresponse of carriers in Si ion-implanted Si,” Appl. Phys. Lett., vol. 69, pp. 653-655, May 1996.
[4.16] Y. B. Kim, S. R. Lee, D. Lee, C. B. Lee, M. Chang, J. H. Hur, M. J. Lee, G. S. Park, C. J. Kim, U. I. Chung, I. K. Yoo and K. Kim, “Bi-layered RRAM with unlimited endurance and extremely uniform switching,” in Symp. on VLSI Tech. Dig., 2011, pp. 52-53.
[4.17] J. H. Hur, M. J. Lee, C. B. Lee, Y. B. Kim and C. J. Kim, “Modeling for bipolar resistive memory switching in transition-metal oxides,” Phys. Rev. B, vol. 82, p. 155321, Oct. 2010

Chapter 5:
[5.1] International Technology Roadmap for Semiconductors (ITRS), 2010. [Online]. Available: www.itrs.net
[5.2] S. H. Lin, Albert Chin, F. S. Yeh, and S. P. McAlister, “Good 150oC retention and fast erase charge-trapping-engineered memory with scaled Si3N4,” in IEDM Tech. Dig., 2008, pp. 843-846.
[5.3] C. H. Lai, Albert Chin, H. L. Kao, K. M. Chen, M. Hong, J. Kwo and C. C. Chi, “Very Low Voltage SiO2/HfON/HfAlO/TaN Memory with Fast Speed and Good Retention,” in Symp. on VLSI Tech. Dig., 2006, pp. 54-55.
[5.4] U. Russo, D. Ielmini, C. Cagli, A. L. Lacaita, S. Spiga, C. Wiemer, M. Perego, and M. Fanciulli, “Conductive-filament switching analysis and self-accelerated thermal dissolution model for reset in NiO-based RRAM,” in IEDM Tech. Dig., 2007, pp. 775-778.
[5.5] H. S. Yoon, I. G. Baek, J. Zhao, H. Sim, M. Y. Park, H. Lee, G. H. Oh, J. C. Shin, I. S. Yeo and U. I. Chung, “Vertical cross-point resistance change memory for ultra-high density non-volatile memory applications,” in Symp. on VLSI Tech. Dig., 2009, pp. 26-27.
[5.6] X. Sun, B. Sun, L. Liu, N. Xu, X. Liu, R. Han, J. Kang, G. Xiong and T. P. Ma, “Resistive switching in CeOx films for nonvolatile memory application,” IEEE Electron Device Lett., vol. 30, pp. 334-336, April 2009.
[5.7] Q. Liu, S. Long, W. Wang, Q. Zuo, S. Zhang, J. Chen and M. Liu, “Improvement of resistive switching properties in ZrO2-based ReRAM with implanted Ions,” IEEE Electron Device Lett., vol. 30, pp. 1335-1337, Dec. 2009.
[5.8] D. Lee, D. J. Seong, H. J. Choi, I. Jo, R. Dong, W. Xiang, S. Oh, M. Pyun, S. O. Seo, S. Heo, M. Jo, D. K. Hwang, H. K. Park, M. Chang, M. Hasan and H. Hwang, “Excellent uniformity and reproducible resistance switching characteristics of doped binary metal oxides for non-volatile resistance memory applications,” in IEDM Tech. Dig., 2006, pp. 797-800.
[5.9] D. J. Seong, J. Park, N. Lee, M. Hasan, S. Jung, H. Choi, J. Lee, M. Jo, W. Lee, S. Park, S. Kim, Y. H. Jang, Y. Lee, M. Sung, D. Kil, Y. Hwang, S. Chung, J. Roh, and H. Hwang, “Effect of oxygen migration and interface engineering on resistance switching behavior of reactive metal/polycrystalline Pr0.7Ca0.3MnO3 device for nonvolatile memory applications,” in IEDM Tech. Dig., 2009, pp. 101-104.
[5.10] M. Jo, D. J. Seong, S. Kim, J. Lee, W. Lee, J. B. Park, S. Park, S. Jung, J. Shin, D. Lee and H. Hwang, “Novel Cross-point Resistive Switching Memory with Self-formed Schottky Barrier,” in VLSI Symp. Tech. Dig., 2010, pp. 53-54.
[5.11] B. Gao, B. Sun, H. Zhang, L. Liu, X. Liu, R. Han, J. Kang and B. Yu, “Unified physical model of bipolar oxide-based resistive switching memory,” IEEE Electron Device Lett., vol. 30, pp. 1326-1328, Dec. 2009.
[5.12] N. Xu, B. Gao, L. F. Liu, Bing Sun, X. Y. Liu, R. Q. Han, J. F. Kang, and B. Yu, “A unified physical model of switching behavior in oxide-based RRAM,” in VLSI Symp. Tech. Dig., 2008, pp. 100-101.
[5.13] W. C. Chen, Y. C. Chen, E. K. Lai, Y. D. Yao, P. Lin, S. F. Horng, J. Gong, T. H. Chou, H. M. Lin, M. N. Chang, Y. H. Shih, K. Y. Hsieh, R. Liu, and C. Y. Lu, “Unipolar switching behaviors of RTO WOx RRAM,” IEEE Electron Device Lett., vol. 31, pp. 126-128, Feb. 2010.
[5.14] D. Choi, D. Lee, H. Sim, M. Chang, and H. Hwang, “Reversible resistive switching of SrTiOx thin films for nonvolatile memory applications,” Appl. Phys. Lett., vol. 88, p. 082904, Feb. 2006.
[5.15] H. Y. Lee, P. S. Chen, T. Y. Wu, Y. S. Chen, C. C. Wang, P. J. Tzeng, and C. H. Lin, F. Chen, C. H. Lien, and M.-J. Tsai, “Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM,” in IEDM Tech. Dig., 2008, pp. 297-300.
[5.16] C. H. Cheng, Albert Chin and F. S. Yeh,“Novel ultra-low power RRAM with good endurance and retention,” in Symp. on VLSI Tech. Dig., 2010, pp. 85-86.
[5.17] A. Chin, K. Lee, B. C. Lin, and S. Horng, “Picosecond photoresponse of carriers in Si ion-implanted Si,” Appl. Phys. Lett. vol. 69, pp. 653-655, May 1996.
[5.18] K. C. Chiang, C. H. Cheng, H. C. Pan, C. N. Hsiao, C. P. Chou, Albert Chin and H. L. Hwang, “High-temperature leakage improvement in metal-insulator-metal capacitors by work-function tuning,” IEEE Electron Device Lett., vol. 28, no. 3, pp. 235-237, Mar. 2007.
[5.19] A. Rose, “Space-charge-limited currents in solids,” Phys. Rev., vol. 97, pp. 1538-1544, June 1955.
[5.20] Tamura, G. H. Lu, and R. Yamamoto, “First principle study of neutral oxygen vacancies in amorphous Silica and Germania,” Phys. Rev. B, vol. 69, no. 19, p. 195 204, May 2004.
[5.21] N. Sasi, C. Balasubramanian, and S. K. Narayandass, “Structure, dielectric, and AC conduction studies on Germanium dioxide thin films,” Phys. Stat. Sol. (A), vol. 103, no. 2, pp. 475-480, Oct. 1987.
[5.22] W. B. Chen and A. Chin, “Interfacial layer dependence on device property of high-k TiLaO Ge/Si n-type metal–oxide–semiconductor capacitors at small equivalent-oxide thickness,” Appl. Phys. Lett., vol. 95, no. 21, p. 212 105, Nov. 2009.
[5.23] C. Morant, L. Galan, and J. M. Sanz, “An XPS study of the initial stages of oxidation of hafnium,” Surf. Interface Anal., vol. 16, pp. 304-308, July 1990.
[5.24] K. Ramani, C. R. Essary, S. Y. Son, V. Craciun, and R. K. Singh, “Low temperature nitrogen incorporation method for enhanced electrical properties in hafnia based gate dielectrics,” Appl. Phys. Lett., vol. 89, p. 242902, Dec. 2006.
[5.25] C. S. Kang, H.-J. Cho, K. Onishi, R. Nieh, R. Choi, S. Gopalan, S. Krishnan, J. H. Han, and Jack C. Lee, “Bonding states and electrical properties of ultrathin HfOxNy gate dielectrics,” Appl. Phys. Lett., vol. 81, p. 2593, Aug. 2002.

Chapter 6:
[6.1] K. J. Baeg, Y. Y. Noh, J. Ghim, S. J. Kang, H. Lee and D. Y. Kim, “Organic non-volatile memory based on pentacene field-effect transistors using a polymeric gate electret,” Adv. Mater., vol. 18, pp. 3179-3183, Dec. 2006.
[6.2] M. F. Chang, P. T. Lee, S. P. McAlister and Albert Chin, “A flexible organic pentacene nonvolatile memory based on high-k dielectric layers,” Appl. Phys. Lett., vol. 93, p. 233302, Dec. 2008.
[6.3] M. J. Lee, C. B. Lee, S. Kim, H. Yin, J. Park, S. E. Ahn, B. S. Kang, K. H. Kim, G. Stefanovich, I. Song, S. W. Kim, J. H. Lee, S. J. Chung, Y. H. Kim, C. S. Lee, J. B. Park, I. G. Baek, C. J. Kim, Y. Park, “Stack friendly all-oxide 3D RRAM using GaInZnO peripheral TFT realized over glass substrates,” in IEDM Tech. Dig., 2008, pp. 85-88.
[6.4] S. Kim, H. Moon, D. Gupta, S. Yoo and Y. K Choi, “Resistive switching characteristics of sol-gel zinc oxide films for flexible memory application, IEEE Trans. on Electron Devices, vol. 56, pp. 696-699, April 2009.
[6.5] J. W. Seo, J. W. Park, K. S. Lin, S. J. Kang, Y. H. Hong, J. H. Yang, L. Fang, G. Y. Sung and H. K. Kim, “Transparent flexible resistive random access memory fabricated at room temperature,” Appl. Phys. Lett., vol. 95, p. 133508, Oct. 2009.
[6.6] G. H. Buh, I. Hwang and B. H. Park, “Time-dependent electroforming in NiO resistive switching devices,” Appl. Phys. Lett., vol. 95, p. 142101, Oct. 2009.
[6.7] X. Wu, P. Zhou, J. Li, L. Y. Chen, H. B. Lv, Y. Y. Lin and T. A. Tang, “Reproducible unipolar resistance switching in stoichiometric ZrO2 films” Appl. Phys. Lett., vol. 90, p. 183507, May 2007.
[6.8] B. Sun, Y. X. Liu, L. F. Liu, N. Xu, Y. Wang, X. Y. Liu, R. Q. Han and J. F. Kang, “Highly uniform resistive switching characteristics of TiN/ZrO2/Pt memory devices” J. Appl. Phys., vol.105, pp. 061630, Mar. 2009.
[6.9] W. Guan, S. Long, R. Jia and M. Liu, “Nonvolatile resistive switching memory utilizing gold nanocrystals embedded in zirconium oxide” Appl. Phys. Lett., vol. 91, p. 062111, Aug. 2007.
[6.10] N. Xu, L. Liu, X. Sun, X. Liu, D. Han, Y. Wang, R. Han, J. Kang and B. Yu, “Characteristics and mechanism of conduction/set process in TiN/ZnO/Pt resistive switching random-access memories” Appl. Phys. Lett., vol. 92, p. 232112, June 2008.
[6.11] C. Yoshida, K. Tsunoda, H. Noshiro and Y. Sugiyama, “High speed resistive switching in Pt/TiO2/TiN film for nonvolatile memory application” Appl. Phys. Lett., vol. 91, p. 223510, Nov. 2007.
[6.12] R. Dong, D. S. Lee, W. F. Xiang, S. J. Oh, D. J. Seong, S. H. Heo, H. J. Choi, M. J. Kwon, S, N. Seo, M. B. Pyun, M. Hasan and H. Hwang, “Reproducible hysteresis and resistive switching in metal-CuxO-metal heterostructures” Appl. Phys. Lett., vol. 90, p. 042107, Jan. 2007.
[6.13] P. Zhou, M. Yin, H. J. Wan, H. B. Lu, T. A. Tang and Y. Y. Lin, “Role of TaON interface for CuxO resistive switching memory based on a combined model” Appl. Phys. Lett., vol. 94, p. 053510, Feb. 2009.
[6.14] D. Lee, D. J. Seong, I Jo, F. Xiang, R. Dong, S. Oh and H. Hwang, “Resistance switching of copper doped MoOx films for nonvolatile memory applications” Appl. Phys. Lett., vol. 90, p. 122104, Mar. 2007.
[6.15] D. Choi, D. Lee, H. Sim, M. Chang, and H. Hwang, “Reversible resistive switching of SrTiOx thin films for nonvolatile memory applications,” Appl. Phys. Lett., vol. 88, p. 082904, Feb. 2006.
[6.16] M. C. Ni, S. M. Guo, H. F. Tian, Y. G. Zhao and J. Q. Li, “Resistive switching effect in SrTiO3-δ/Nb-doped SrTiO3 heterojunction” Appl. Phys. Lett., vol. 91, p. 183502, Oct. 2007.
[6.17] R. Waser and M. Aono, “Nanoionics-based resistive switching memories,” Nat. Mater., vol. 6, pp. 833-840, Nov. 2007.
[6.18] C. Cagli, F. Nardi, and D. Ielmini, “Modeling of set/reset operations in NiO-based resistive-switching memory devices,” IEEE Trans. on Electron Devices, vol. 56, pp. 1712-1720, Aug. 2009.
[6.19] H. Y. Lee, P. S. Chen, T. Y. Wu, Y. S. Chen, C. C. Wang, P. J. Tzeng, and C. H. Lin, F. Chen, C. H. Lien, and M.-J. Tsai, “Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM,” in IEDM Tech. Dig., 2008, pp. 297-300.
[6.20] M. Janousch, G. I. Meijer, U. Staub, B. Delley, S. F. Karg, and B. P. Andreasson, “Role of oxygen vacancies in Cr-doped SrTiO3 resistance-change memory,” Adv. Mater., vol. 19, pp. 2232-2235, Sept. 2007.
[6.21] R.Waser, R. Dittmann, G. Staikov, and K. Szot, “Redox-based resistive switching memories- nanoionic mechanisms, prospects, and challenges,” Adv. Mater., vol. 21, pp. 2632-2663, July 2009.
[6.22] C. H. Cheng, Albert Chin and F. S. Yeh, “Novel ultra-low power RRAM with good endurance and retention,” in Symp. on VLSI Tech. Dig., 2010, pp. 85-86.
[6.23] S. H. Lin, Albert Chin, F. S. Yeh, and S. P. McAlister, “Good 150oC retention and fast erase charge-trapping-engineered memory with scaled Si3N4,” in IEDM Tech. Dig., 2008, pp. 843-846.
[6.24] K. C. Chiang, C. H. Cheng, H. C. Pan, C. N. Hsiao, C. P. Chou, Albert Chin and H. L. Hwang, “High-temperature leakage improvement in metal-insulator-metal capacitors by work-function tuning,” IEEE Electron Device Lett., vol. 28, no. 3, pp. 235-237, Mar. 2007.
[6.25] A. Rose, “Space-charge-limited currents in solids,” Phys. Rev., vol. 97, pp. 1538-1544, June 1955.
[6.26] A. Chin, K. Lee, B. C. Lin, and S. Horng, “Picosecond photoresponse of carriers in Si ion-implanted Si,” Appl. Phys. Lett., vol. 69, pp. 653-655, May 1996.
[6.27] International Technology Roadmap for Semiconductors (ITRS), 2010. [Online]. Available: www.itrs.net
[6.28] S. B. Chen, C. H. Lai, A. Chin, J. C. Hsieh, and J. Liu, “High-temperature leakage improvement in metal-insulator-metal capacitors by work-function tuning,” IEEE Electron Device Lett., vol. 23, pp. 185-187, April 2002.
[6.29] W. Shen, R. Dittmann, U. Breuer, and R. Waser, “Improved endurance behavior of resistive switching in (Ba,Sr)TiO3 thin films with W top electrode,” Appl. Phys. Lett., vol. 93, p. 222102, Dec. 2008.

Chapter 7:
[7.1] International Technology Roadmap for Semiconductors (ITRS), 2010. [Online]. Available: www.itrs.net
[7.2] Albert Chin, C. C. Laio, K. C. Chiang, D. S. Yu, W. J. Yoo, G. S. Samudra, S. P. McAlister, and C. C. Chi, “Low voltage high speed SiO2/AlGaN/AlLaO3/TaN memory with good retention,” in IEDM Tech. Dig., 2005, pp. 165-168.
[7.3] C. Y. Tsai, T. H. Lee, Albert Chin, Hong Wang, C. H. Cheng, and F. S. Yeh, “Highly-scaled 3.6-nm ENT trapping layer MONOS device with good retention and endurance,” in IEDM Tech. Dig., 2010, pp. 110-113.
[7.4] U. Russo, D. Ielmini, C. Cagli, A. L. Lacaita, S. Spiga, C. Wiemer, M. Perego, and M. Fanciulli, “Conductive-filament switching analysis and self-accelerated thermal dissolution model for reset in NiO-based RRAM,” in IEDM Tech. Dig., 2007, pp. 775-778.
[7.5] N. Xu, B. Gao, L. F. Liu, Bing Sun, X. Y. Liu, R. Q. Han, J. F. Kang, and B. Yu, “A unified physical model of switching behavior in oxide-based RRAM,” in VLSI Symp. Tech. Dig., 2008, pp. 100-101.
[7.6] H. S. Yoon, I. G. Baek, J. Zhao, H. Sim, M. Y. Park, H. Lee, G. H. Oh, J. C. Shin, I. S. Yeo and U. I. Chung, “Vertical cross-point resistance change memory for ultra-high density non-volatile memory applications,” in Symp. on VLSI Tech. Dig., 2009, pp. 26-27.
[7.7] X. Sun, B. Sun, L. Liu, N. Xu, X. Liu, R. Han, J. Kang, G. Xiong and T. P. Ma, “Resistive switching in CeOx films for nonvolatile memory application,” IEEE Electron Device Lett., vol. 30, pp. 334-336, April 2009.
[7.8] Q. Liu, S. Long, W. Wang, Q. Zuo, S. Zhang, J. Chen and M. Liu, “Improvement of resistive switching properties in ZrO2-based ReRAM with implanted Ions,” IEEE Electron Device Lett., vol. 30, pp. 1335-1337, Dec. 2009.
[7.9] B. Gao, B. Sun, H. Zhang, L. Liu, X. Liu, R. Han, J. Kang and B. Yu, “Unified physical model of bipolar oxide-based resistive switching memory,” IEEE Electron Device Lett., vol. 30, pp. 1326-1328, Dec. 2009.
[7.10] M. Jo, D. J. Seong, S. Kim, J. Lee, W. Lee, J. B. Park, S. Park, S. Jung, J. Shin, D. Lee and H. Hwang, “Novel cross-point resistive switching memory with self-formed Schottky barrier,” in VLSI Symp. Tech. Dig., 2010, pp. 53-54.
[7.11] C. H. Cheng, Albert Chin and F. S. Yeh, “Novel ultra-low power RRAM with good endurance and retention,” in Symp. on VLSI Tech. Dig., 2010, pp. 85-86.
[7.12] C. H. Cheng, Albert Chin and F. S. Yeh, “High performance ultra-low energy RRAM with good retention and endurance” in IEDM Tech. Dig., 2010, pp.448-451.
[7.13] C. H. Cheng, Albert Chin and F. S. Yeh, “Very High performance non-volatile memory on flexible substrate with low switching power and excellent endurance,” Adv. Mater., vol. 23, pp. 902-905, Dec. 2010.
[7.14] A. Chin, K. Lee, B. C. Lin, and S. Horng, “Picosecond photoresponse of carriers in Si ion-implanted Si,” Appl. Phys. Lett., vol. 69, pp. 653-655, May 1996.
[7.15] M. J. Kim, I. G. Baek, Y. H. Ha, S. J. Baik, J. H. Kim, D. J. Seong, S. J. Kim, Y. H. Kwon, C. R. Lim, H. K. Park, D. Gilmer, P. Kirsch, R. Jammy, Y. G. Shin, S. Choi, and C. Chung, “Low power operating bipolar TMO ReRAM for sub 10nm era” in IEDM Tech. Dig., 2010, pp.444-447.
[7.16] T. Morikawa, S. Saeki, T. Suzuki, T. Kajino and T. Motohiro, “Dual functional modification by N doping of Ta2O5: p-type conduction in visible-light-activated N-doped Ta2O5,” Appl. Phys. Lett., vol. 96, p. 142111, April 2010.
[7.17] S. Majumdar and P. Banerji, “Hopping conduction in nitrogen doped ZnO in the temperature range 10-300 K” J. Appl. Phys., vol.107, pp. 063702, Mar. 2010.
[7.18] C. C. Yeh, T. P. Ma, N. Ramaswamy, N. Rocklein, D. Gealy, T. Graettinger and K. Min, “Frenkel-Poole trap energy extraction of atomic layer deposited Al2O3 and HfxAlyO thin film,” Appl. Phys. Lett., vol. 91, p. 113521, Sept. 2007.
[7.19] S. H. Lin, K. C. Chiang, Albert Chin and F. S. Yeh, “High density and low leakage current MIM capacitor using stacked TiO2/ZrO2 insulators,” IEEE Electron Device Lett., vol. 30, pp. 715-717, July 2009.
[7.20] C. C. Yeh, T. P. Ma, N. Ramaswamy, N. Rocklein, D. Gealy, T. Graettinger and K. Min, “Frenkel-Poole trap energy extraction of atomic layer deposited Al2O3 and HfxAlyO thin film,” Appl. Phys. Lett., vol. 91, p. 113521, Sept. 2007.
[7.21] W. B. Chen, B. S. Shie, C. H. Cheng, K. C. Hsu, C. C. Chi, and Albert Chin, “Higher κ metal-gate/high-κ/Ge n-MOSFETs with <1 nm EOT using laser annealing,” in IEDM Tech. Dig., 2010, pp. 420-423.
[7.22] Lee, J. Shin, D. Lee, W. Lee, S. Jung, M. Jo, J. Park, K. Biju, S. Kim, S. Park, and H. Hwang, “Diode-less nano-scale ZrOx/HfOx RRAM device with excellent switching uniformity and reliability for high-density cross-point memory application,” in IEDM Tech. Dig., 2010, pp. 452-455.
[7.23] C. H. Ho, C. L. Hsu, C. C. Chen, J. T. Liu, C. S. Wu, C. C. Huang, C. Hu and F. L. Yang, “9nm Half-Pitch Functional Resistive Memory Cell with <1μA Programming Current Using Thermally Oxidized Sub-Stoichiometric WOx Film,” in IEDM Tech. Dig., 2010, pp. 436-439.
[7.24] G. Bersuker, D. C. Gilmer, D. Veksler, J. Yum, H. Park, S. Lian, L. Vandelli, A. Padovani, L. Larcher, K. McKenna, A. Shluger, V. Iglesias, M. Porti, M. Nafria, W. Taylor, P. D. Kirsch and R. Jammy, “Metal oxide RRAM switching mechanism based on conductive filament microscopic properties,” in IEDM Tech. Dig., 2010, pp. 456-459.
Publication List

(A) International Journals & Letters:

[1] C. H. Cheng, H. H. Hsu, I. J. Hsieh, C. K. Deng, Albert Chin and F. S. Yeh “High-k TiCeO MIM Capacitors with a Dual-plasma Interface Treatment,” Electrochemical and Solid-State Letters, 13 (4), H112-H115, 2010.
[2] C. H. Cheng, H. H. Hsu, Albert Chin and F. S. Yeh “Higher-k Titanium Dioxde Incorporating LaAlO3 as Dielectrics for MIM Capacitors,” Solid-State Electronics, vol. 54, pp. 646-649, 2010.
[3] C. H. Cheng, C. C. Huang, H. H. Hsu, K. C. Chiang, B. H. Liou, Albert Chin and F. S. Yeh “A Study on Frequency-Dependent Voltage Nonlinearity of SrTiO3 RF Capacitor,” Electrochemical and Solid-State Letters, 13 (12), H436-H439, 2010.
[4] C. H. Cheng, Albert Chin and F. S. Yeh “Ultralow-Power Ni/GeO/STO/TaN Resistive Switching Memory,” IEEE Electron Device Lett., vol. 31, no. 9, pp. 1020-1022, 2010.
[5] C. H. Cheng, Albert Chin and F. S. Yeh “Novel Stacked GeO/STO Resistive Memory with Ultra-Low Resistance Currents,” Appl. Phy. Lett., vol. 98, pp. 052905, 2011.
[6] C. H. Cheng, Albert Chin and F. S. Yeh “Ultra-low Switching Energy Ni/GeOx/HfON/TaN RRAM,” IEEE Electron Device Lett., vol. 32, no. 3, pp. 366-368 , 2011.
[7] C. H. Cheng, Albert Chin and F. S. Yeh “Very High Performance Non-Volatile Memory on Flexible Substrate with Low Switching Power and Excellent Endurance,” Advanced Materials, vol.23, pp. 902-905, 2011.
[8] C. H. Cheng, P. C. Chen, H. H. Hsu, Albert Chin and F. S. Yeh “Bipolar switching characteristics of low-power GeO resistive memory,” Solid-State Electronics, vol. 62, pp. 90-93, 2011.
[9] C. H. Cheng, P. C. Chen, Y. H. Wu, F. S. Yeh and Albert Chin “Long Endurance Nano-Crystal TiO2 Resistive Memory Using TaON Buffer Layer,” IEEE Electron Device Lett., vol. 32, pp.1749-1751, 2011.
[10] C. H. Cheng, P. C. Chen, Y. H. Wu, F. S. Yeh and Albert Chin “Highly Uniform Low-Power Resistive Memory Using Nitrogen-Doped Tantalum Pentoxide,” Solid-State Electronics, vol. 73, pp. 60-63, 2012.
[11] K. Y. Chou, C. H. Cheng, P. C. Chen, Albert Chin and F. S. Yeh “Unipolar GeOx/PZT Resistive Switching Memory,” Jpn. J. Appl. Phys, vol. 50, p. 121801, 2011.
[12] C. Y. Tsai, C. H. Cheng, T. Y. Chang, K. C. Chou, Albert Chin and F. S. Yeh “Size-dependent trapping effect in nano-dot non-volatile memory” ECS Transactions, vol. 41, (3), p. 121-132 (2011).

(B) Conferences & Proceeding:

[1] C. H. Cheng, Albert Chin and F. S. Yeh “Novel ultra-low power RRAM with good endurance and retention” Symp. on VLSI Technology, pp. 85-86, Hawaii, June 2010.
[2] C. H. Cheng, Albert Chin and F. S. Yeh “High Performance Ultra-Low Energy RRAM with Good Retention and Endurance” International Electron Devices Meeting (IEDM) Tech. Dig., pp.448-451, San Francisco, December 2010.
[3] C. H. Cheng, Albert Chin and F. S. Yeh “Very High Performance Non-Volatile Memory on Flexible Plastic Substrate” International Electron Devices Meeting (IEDM) Tech. Dig., pp.512-515, San Francisco, December 2010.
[4] C. Y. Tsai, T. H. Lee, Hong Wan, Albert Chin, C. H. Cheng and F. S. Yeh “Highly-scaled 3.6-nm ENT trapping layer MONOS device with good retention and endurance” International Electron Devices Meeting (IEDM) Tech. Dig., pp.110-113, San Francisco, December 2010.
[5] Albert Chin, W. B. Chen, B. S. Shie, K. C. Hsu, P. C. Chen, C. H. Cheng, C. C. Chi, Y. H. Wu, K. S. Chaing-Liao, S. J. Wang, C. H. Kuan, and F. S. Yeh” Metal-Gate/High-k CMOS scaling from Si to Ge at small EOT” 10th Int’l Conf. on Solid-State & Integrated-Circuit Technology (ICSICT), Nov., 2010.
[6] Che-Wei Chen, Chun-Hu Cheng, Hung-Chung Yu, Gia-Yeh Huang, Nian-Huei Chen, Albert Chin, Fon-Shan Huang, “Immersion-plated Gold Nanocrystal Embedded in LaxO1-x for Nonvolatile Memory”, 2011 MRS Spring Meeting, San Francisco, CA .U.S.A (2011).
[7] C. Y. Tsai, C. H. Cheng, T. Y. Chang, K. C. Chou, Albert Chin and F. S. Yeh “Size-dependent trapping effect in nano-dot non-volatile memory” 220th Meeting of the Electrochemical Society (ECS), 802, 1910, October 2011.