毫米波無限通訊系統能在短距離的傳輸中，提供高資料流的傳輸。由於毫米波的波長較小，使得傳輸端與接收端能使用較大量的天線傳輸資料，減輕毫米波訊號衰退較強所造成的影響。此外，藉由多資料流系統的預編碼的技術，能夠進一步的提升傳輸的品質。然而，因毫米波系統能使用較多的天線數目，使得射頻電路的複雜度也隨之提高。為了降低硬體的複雜度，預編碼處理可由類比和數位電路的間接處理，而以較低複雜度的電路來實現。
這篇論文題出了新的射頻/基頻預編碼系統之建構方法，不僅減少了原先預編碼重建之演算法的運算複雜度，還能給予較高的硬體平行度。最後，此研究利用TSMC90GUTM製程來實作本論文所提出的演算法之預編碼重建處理器。此處理器適用於8x8多輸入多輸出毫米波系統，能支援一至四個資料流的傳輸，共四種模式。當電源供應為1V時，此處理器的操作頻率為167 MHz，且功率消耗為243.2 mW。另外，此處理器的核心面積為3.94 mm2。當資料流為ㄧ至四時，此處理器分別能在每秒運算6.7 M、6.7 M、4.9 M、4 M個不同的通道矩陣。

A millimeter wave (mmWave) communication system provides multi-Gbps data rate in the short-distance transmission. Due to the small wavelengths of millimeter waves, the transceiver is able to use large antenna arrays to alleviate the serious signal attenuation. Furthermore, the link performance can be improved by adopting precoding technology in the multiple data stream transmission. However, the complexity of radio frequency chains (RF) grows even higher with large antenna arrays in the mmWave system. To reduce the hardware cost, the precoding circuit can be jointly designed in both the analog and digital domains and realized by simpler circuits. This thesis proposes a new method of building the joint RF and baseband precoder to reduce the computation complexity of the original precoder reconstruction algorithm and enable high parallelism hardware architecture. Moreover, the proposed precoder reconstruction algorithm is designed and implemented by using TSMC 90nm UTM CMOS technology. The proposed precoder reconstruction processor supports the transmissions of 1 to 4 data streams for 8x8 mmWave MIMO systems. The operating frequency of this chip is 167 MHz and power consumption is 243.2 mW when supply voltage is 1 V. The core area of post-layout result is about 3.94 mm$^2$. The proposed processor can achieve 4 M, 4.9 M, 6.7 M, 6.7 M channel-matrices per second in four-, three-, two-, and one-stream modes, respectively.

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