在半導體產業中，其製程相對地較其他一般製造業複雜許多。其中，以LED磊晶片製程為例，此產業因本身的波動性大，以目前的製造技術仍無法穩定地控制最終產品的規格，在最終產出規格分佈為不確定性的情況下，要預測完成訂單所需的總生產時間是相當困難的，此問題不僅影響了產品的交期時間，甚至直接威脅到顧客對公司的服務滿意度。然而，對於決策者而言，在生產之前能夠規劃好每個製造技術的投入量，並使其所花費的總生產時間最小化亦同時滿足訂單的需求，是一件非常關鍵且重要的任務。在本研究中，我們考慮了LED磊晶片製程中的隨機性，並提出了一個數學模型來描述此問題，基於此數學模型，透過模擬模型來建構出問題的反應曲面，以metamodel的形式來表示目標函數，將之轉變為確定型的形式再進行模擬最佳化數學模型的求解。在實證分析中，透過建構情境來充分地證明了本研究所提出的數學模型與演算法所求得最佳產品投入量之組合於實務上的可行性。

In semiconductor manufacturing, the process is more complicated than other manufacturing processes. For example, in LED epitaxial wafer manufacturing, which has large fluctuations and it is still not stable to control the specification of product in current. However, due to the uncertain output distribution, to predict the total production time is very difficult. This problem affects the delivery time of product and the customer service satisfaction. However, for manufacturers, to decide the amount of each manufacturing technique before production, is a critical to minimize the total production time. In this paper, we develop a mathematical model to characterize the problem in LED epitaxial wafer manufacturing. Based on the mathematical model, we use the simulation optimization technique to construct the response surface and use a metamodel form to characterize the objective function. We also solve this model and derive the optimal inputs that can achieve minimum the total production time. An empirical study is conducted to verify the viability of the proposed model in real settings.

[1]Barton, R.R., J.S. Ivey. 1996. “Nelder-Mead simplex modifications for simulation optimization”, Management Science, 42(7), pp.954-973.
[2]Barton, R.R., M. Meckesheimer. 2006. “Metamodel-based simulation optimization”, Operations Research and Management Science, 13, pp.535-574, Elsevier, Amsterdam.
[3]Chang, K.H., L.J. Hong, and H. Wan. 2013. “Stochastic trust-region response surface method (STRONG)-a new response surface framework for simulation optimization”, INFORMS Journal on Computing, 25(2), pp.230-243.
[4]Chen, T., Y.C. Lin. 2009. “A fuzzy back propagation network ensemble with example classification for lot output time prediction in a wafer fab”, Applied Soft Computing, 9(2), pp.658-666.
[5]Chien, C.F., C. Chen. 2007. “Using ga and ctpn for modeling the optimization-based schedule generator of a generic production scheduling system”, International Journal of Production Research, 45(8), pp.1763-1789.
[6]Conn, A.R., N.L.M. Gould, P.L. Toint. 2000. “Trust-region methods”.
[7]Chung, S.H., H.W. Huang. 2002. “Cycle time estimation for wafer fab with engineering lots”, IIE Transactions, 34(2), pp.105-118.
[8]Ehteshami, B., R.G. Petrakian, P.M. Shabe. 1992. “Trade-offs in cycle time management: hot lots”, IEEE Transactions on Semiconductor Manufacturing, 5(2), pp.101-106.
[9]Fu, M.C. 2002. “Optimization for simulation: Theory vs. practice”, INFORMS Journal on Computing, 14(3), pp.192-215.
[10]Gallant, A. R. 1987. “Nonlinear statistical models”, John Wiley, New York.
[11]Goldberg, D.E. 1989. “Genetic algorithms in search, optimization, and machine learning”, 412, Reading Menlo Park: Addison-wesley.
[12]Hsieh L.Y., K.H. Chang, and C.F. Chien. 2013. “Efficient development of cycle time response surfaces using progressive simulation metamodeling”, International Journal of Production Research, 52(10), pp.3097-3109.
[13]Kirkpatrick, S., and M.P. Vecchi. 1983. “Optimization by simulated annealing”, Science, 220(4598), pp.671-680.
[14]Law, A.M. 2007. “Simulation modeling and analysis”, 4th ed, McGraw-Hill, Boston.
[15]Myers, R.H., and C.M. Anderson-Cook. 2009. “Response surface methodology: process and product optimization using designed experiments”, 705, John Wiley & Sons.
[16]Nadarajah, S., S. Kots. 2008. “The cycle time distribution”, International Journal of Production Research, 46(11), pp.3133-3141.
[17]Neddermeijer, H.G., G.J.V. Oortmarssen, N. Piersma, R. Dekker. 2000. “A framework for response surface methodology for simulation optimization”, J.A. Joines, R.R. Barton, K. Kang, P.A.
[18]SchÄomig, A., J. W. Fowler. 2000. “Modelling semiconductor manufacturing operations”, Proceedings of the 9th ASIM Simulation in Production and Logistics Conference, 55(64), Berlin, Germany.
[19]Shanthikumar, J.G., S. Ding, M.T. Zhang. 2007. “Queueing theory for semiconductor manufacturing systems: A survey and open problems”, IEEE Transactions on Automation Science and Engineering, 4(4), pp.513-522.
[20]Sivakumar, A.I., C.S. Chong. 2001. “A simulation based analysis of cycle time distribution, and throughput in semiconductor backend manufacturing”, Computers in Industry, 45(1), pp.59-78.
[21]Spall, J.C. 2005. “Introduction to Stochastic Search and Optimization: Estimation, Simulation, and Control”, John Wiley and Sons., New York.
[22]Wein, L.M. 1988. “Scheduling semiconductor wafer fabrication”, IEEE Transactions on Semiconductor Manufacturing, 1(3), pp.115-130.
[23]Yang, F., B.E. Ankenman, B.L. Nelson. 2007. “Efficient generation of cycle time-throughput curves through simulation and metamodeling”, Naval Research Logistics, 54(1), pp.78-93.
[24]Yang, F., B.E. Ankenman, B.L. Nelson. 2008. “Cycle time percentile curves for manufacturing systems”, INFORMS Journal on Computing, 20(4), pp.628-643.
[25]林則孟，2001，「系統模擬理論與應用」，初版，滄海書局。
[26]黎正中，2010，「實驗設計與分析」，第七版，高立圖書有限公司。
[27]姜林杰祐，張逸輝，陳家明，黃家祚，2001，「系統模擬eM-Plant_(SIMPLE++)操作與實務」，初版，華泰文化事業股份有限公司。