先進的2.5D FPGA與傳統FPGA相比，2.5D FPGA具有更大的邏輯容量和更高的引腳數量可用。這樣的FPGA也已經應用於多重FPGA系統。例如商用2.5D FPGA由多個裸晶所組成的，裸晶之間使用載板相互連接．相較於裸晶內的連接資源，載板提供裸晶之間相互連接的資源會造成額外的信號延遲。在多重FPGA系統中，分時複用（TDM）技術時常被使用來提高各個FPGA中邏輯資源的使用率，藉由讓單一實體線可以容納多個inter-FPGA的信號。不僅有經由載板傳輸的信號還有使用分時復用技術傳輸的信號皆會造成額外的信號的延遲。在本論文中，我們制定了在多重2.5D FPGA系統下時間導向的繞線並同時配置線段分時復用問題，我們延伸傳統的迷宮繞線方法在全域繞線中不僅決定每個FPGA間連接關係具有方向性的路由樹並且對於具有方向性的路由樹決定經過SLR的精確路徑和近似TDM的分配，我們也會使用動態規劃的方法來優化TDM的分配並得到更佳的解。實驗結果顯示，我們方法在所有測資中平均改善5.74%相比於一般的方法，在做完TDM優化的結果也顯示可以比沒有使用TDM優化的結果相比平均改善6.44%

Advanced 2.5D field-programmable gate arrays (FPGAs) with a larger capacity and high pin count compared to traditional FPGAs are commercially available. Such FPGAs have also been used for multi-FPGA systems. A commercial 2.5D FPGA consists of multiple dies connected through an interposer. The interposer provides a fraction of the amount of interconnected resources with an increased delay compared to that within an individual die. In a multi-FPGA system, time-division multiplexing (TDM) multiplexes the use of FPGA pins and inter-FPGA physical wires among multiple inter-FPGA signals. Both the interconnects applied through the interposer in 2.5D FPGAs and the TDM used in multi-FPGA systems can increase the signal timing delay. In this thesis, we formulate the problem of timing driven routing with simultaneous TDM assignment in multi-2.5D FPGA systems. We extend the traditional maze-routing based global routing algorithm to handle not only determining directed routing tree for each inter-FPGA net in multi-2.5D FPGA but also determining the exact path through SLRs for directed routing tree, whereas the TDM assignment is approximated during routing. We also use dynamic programming to solve the TDM assignment to refine the final solution. The experimental results show that our algorithm can improve the average outcome by 5.74% for each case compared to a naive method. The results of the TDM optimization show that we can improve the result by 6.44% on average compared to baseline.

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