本實驗以濕式活化無電鍍銅技術，於基材表面鍍上導電用銅膜。將TaN/SiO2/Si平面晶片先經60 ℃敏化活化，再於50 ℃鍍浴無電鍍，可得平整、連續且附著力良好的銅膜；銅顆粒尺寸約數十奈米且密集排列，粗糙度小。在10-3 torr真空下作400 ℃、1 h的退火處理，可減少銅膜內部缺陷並提高銅膜優選方位的程度，使電阻率降為1.84 mΩ-cm，相當接近銅塊材的1.67 mΩ-cm。TaN/SiO2/Si與TiN/SiO2/Si 圖案晶片以上述條件所得無電鍍銅膜，可沿各種凹凸表面覆蓋一層均勻銅膜；因銅顆粒尺寸小，故有潛力於0.1 µm的栓塞內部填入一層均勻且薄的銅膜，以作為電鍍銅的晶種層；或直接填滿0.1 µm的栓塞內部，顯示其具有優良的階梯覆蓋能力與填洞能力。
TaN/SiO2/Si 平面晶片經20 ℃下BOE-HNO3-PdCl2(30 ml-20 ml- 0.02 g)置換液的活化處理，在基材表面沈積Pd晶種層，再於60 ℃下無電鍍，可得到顆粒尺寸與粗糙度較大的銅膜，使電阻率可低至1.77 mΩ-cm，使深次微米元件的運算速度能有更佳的表現。而隨BOE/HNO3含量比例，置換液中加入界面活性劑Triton的含量及置換活化時間的不同，使銅膜的性質亦有所改變。TaN/SiO2/Si與Ta/SiO2/Si 圖案晶片以上述條件所沉積的無電鍍銅膜，可均勻覆蓋0.6 µm的溝槽輪廓，顯示其具良好的階梯覆蓋能力。

由以上結果可知，無電鍍銅技術在積體電路的薄膜導線應用上具相當高的潛力，尤其是敏化活化再無電鍍銅技術，在線寬小於0.1 µm的世代中極有潛力成為銅製程的主力沉積技術。

陸、參考文獻
1. R. A. Levy, M. L. Green and P. K. Gallager, “Characterization of LPCVD Aluminum for VLSI process,” J. Electrochem. Soc., 1984, p. 2175.
2. R. V. Joshi, R. S. Blewer and S. Murarka, “Metallization for Integrated Circuit Manufacturing,” MRS BULLETIN, November, 1995, pp. 33-34.
3. S. Q. Wang, “Filling of Contacts and Interconnects with Cu by XeCl Laser Reflow,” VMIC Conference, Santa Clara, June, 1990, pp. 431-434.
4. Y. Shacham-Diamand and V. Dubin, “Electroless Copper Deposition for ULSI,” Thin Solid Films, Vol. 262, 1995, pp. 93-103.
5. S. P. Jeng, R. H. Havemann and M. C. Chang, “Process Intergration and Manufacturability Issues for High Performance Multilevel Interconnect,” in Advanced Metallization for Devices and Circuits-Science, Technology and Manufacturability Symposium, 1994, p. 25.
6. 陳來助, “ULSI超大型積體電路之銅導線技術,” 電子與材料, 10月號, 1999, pp. 85-70.
7. H. S. Rathore and D. Nguyen, “Effect of Scaling of Interconnection,” Copper Metallization for Sub-Micron Integrated, Vol. 14, No. 5, 1998, pp. 29-44.
8. F. B. Kaufman and D. B. Thompson, “Chemical-Mechanical Polishing for Fabricating Patterned W Metal Feature as Chip Interconnects,” J. Electrochem. Soc., Vol. 138, 1991, pp. 3460-3467.
9. C. S. Ryu PhD Thesis, Materials Sci Eng., Stanford University, 1998.
10. Y. Shacham-Diamand and A. Dedhia, “Copper Transport in Thermal SiO2,” J. Electrochem. Soc., Vol. 140, No.8, 1993, pp. 2427-2432.
11. C. Ryu and H. Lee, “Barrier for Copper Interconnections,” April, 1999, pp. 53-56.
12. T. Oku and E. Kawakami, “Diffusion Barrier Property of TaN Between Si and Cu,” Applied Surface Science, Vol. 99, 1996, pp. 265-272.
13. 吳文發, “積體電路技術中物理氣相沉積製程設備發展,” 電子月刊, 4月號, 1999, pp. 106-114.
14. 張鼎張, “金屬(W、Cu、Al、TiN、TaN)化學氣相沉積技術,” 電子月刊, 4月號, 1999, pp. 116-139.M. B. Naik, W. N. Gill, R. H. Wentorf and R. R. Reeves, “CVD of Copper Using Copper(Ⅰ) and Copper(Ⅱ) β-Diketonates,” Thin Solid Films, Vol. 262, 1995, pp. 60-66.W. W. Lee and P. S. Locke, “Hydrogen-Atom Assisted CVD of Copper at Low Temperatures and In-Situ Gas-Phase Spectroscopy Studies,” Thin Solid Films, Vol. 262, No.1-2, 1995, pp. 39-45.
17. N. Awaya and Y. Arita, “Digest of Technical Papers,” 1989, Section 12-4, p. 103.
18. S. Gandikota and S. Voss, “Adhesion studies of CVD copper metallization,” Microelectronic Engineering, Vol 50, 2000, pp. 547-553.
19. M. Proust, F. Judong, J. M. Gilet, L. Liauzu and R. Madar, “CVD and PVD Copper Integration for Dual Damascene Metallization in a 0.18 μm Process,” Microelectronic Engineering, Vol 55, 2001, pp. 269-275.
20. 蔡明蒔, “半導體製程中銅電鍍技術之製程及設備,” 電子月刊, 4月號, 1999, pp. 155-161.
21. V. M. Dubin and C. H. Ting, “Electro-Chemical Deposition of Copper for ULSI Metallization,” VMIC Conference, Santa Clara, June, 1997, pp. 10-12.
22. R. D. Mikkola, Q. T. Jiang and B. Carpenter, “Copper Electroplating For Advanced Interconnect Technology,” Plating and Surface Finishing, Vol. 87, No.3, 2000, pp. 81-85.
23. S. Y. Chiu and J. M. Shieh, “Characterization of Additive Systems for Damascene Cu Electroplating by The Superfilling Profile Monitor,” J. Vac. Sci. Technol., B Vol. 18, No. 6, 2000, pp. 2835-2841.
24. J. C. Hu and T. C. Chang, “Effects of a New Combination of Additives in Electroplating Solution on the Properties of Cu Films in ULSI Applications,” J. Vac. Sci. Technol. A, Vol. 18, No. 4, 2000, pp. 1207-1210.
25. R. D. Mikkola, Q. T. Jiang, R Carpio and B. Carpenter, “Bath Additive and Current Density Effects on Copper Electroplating Fill of Cu Damascene Structures,” Mat. Res. Soc. Symp. Proc., Vol. 564, 1999, pp. 399-405.
26. P. C. Andricacos, C. Uzoh, J. O. Dukovic, J. Horkans and H. Deligianni, “Damascene Copper Electroplating for Chip Interconnections,” IBM J. Res. Develop., Vol. 42, No. 5, Sep., 1998, pp. 567-574.
27. B. Chin and P. Ding, “Barrier and Seed Layer for Damascene Copper Metallization,” Solid State Technology, July, 1998, pp. 141-147.
28. R. Solanki and B. Pathangey, “Atomic Layer Deposition of Copper Seed Layers,” Electrochemical and Solid-State Letters, Vol. 3, No. 10, 2000, pp. 479-480.
29. J. S. Park and M. J. Lee, “Plasma-Enhanced Atomic Layer Deposition of Tantalum Nitrides Using Hydrogen Radicals as a Reducing Agent,” Electrochemical and Solid-State Letters, Vol. 4, No. 4, 2001, pp. C17-C19.
30. P. Lin and C. H. Ting, “Selective Electroless Copper for VLSI Interconnection,” Electron Device Letters, Vol. 9, 1989, pp. 423-425.
31. 逢板哲爾, “化學反應製造金屬薄膜,” 表面處理工業雜誌, 3期, 1986, pp. 25-31.
32. 神戶德藏著；莊萬發譯, “無電解鍍金,” 復漢出版社印行, 1989.
33. Y. Shacham-Diamand, Valery and M. Angyal, “Electroless Copper Deposition for ULSI,” Thin Solid Film, Vol. 262, 1995, pp. 93-103.
34. Y. Shacham-Diamand and S. Lopatin, “Integrated electroless metallization for ULSI,” Electrochemica Acta , Vol. 44, 1999, pp. 3639-3949.
35. J. Dugasz and A. Szasz, “Factors Affecting the Adhesion of Electroless Coating,” Sur. Coating Technol., Vol. 58, 1993, pp. 57-63.
36. N. Feldstein and J. A. Weiner, “Surface Characterization of Sensitized and Activated Teflon”, J. Electrochem. Soc., Vol. 120, No. 4, 1973, p. 475.
37. R. Sard, “The Nucleation, Growth, and Structure of Electroless Copper Deposits”, J. Electrochem. Soc., Vol. 117, No.7, 1970, p. 864.
38. C. Longo, P. T. Sumodjo and F. Sanz, “Displacement Deposition of Sn from Fluoride Solutions on Pd Predeposited (100) Si Substrate,” J. Electrochem. Soc., Vol. 144, 1997, pp. 1659-1663.
39. V. M. Dubin, “Electroless Ni-P Deposition on Silicon with Pd Activation,” J. Electrochem. Soc., Vol. 139, 1992, pp. 1289-1294.
40. J. Dumesic, J. A. Koutsky, and T. W. Chapman, “The Rate of Electroless Copper Deposition by Formaldehyde Reduction,” J. Electrochem. Soc., Vol. 121, 1974, pp. 1405-1408.
41. J. Shu, B. P. A. Grandjean, and S. Kaliaguine, “Effect of on Cu(OH)2 Electroless Copper Plating,” Ind. Eng. Chem. Res., Vol. 36, 1997, pp. 1632-1636.
42. 方景禮, “電鍍添加劑總論(14),” 表面處理工業雜誌, 153期, 1995, pp. 137-167.
43. J. E. A. van den Meerakker, “On the Mechanism of Electroless Plating: I. Oxidation of Formaldehyde at Different Electrode Surface,” J. Appl. Electrochem., Vol. 11, 1981, pp. 395-401.
44. J. E. A. van den Meerakker, “On the Mechanism of Electroless Plating: II. One Mechanism for Different Reductants,” J. Appl. Electrochem., Vol. 11, 1981, pp. 387-493.
45. 齊藤圈, “金屬表面技術,” 17期, 1966, pp.14-26.
46. H. Honma and T. Kobayashi, “Electroless Copper Deposition Process Using Glyoxylic Acid as a Reducing Agent,” J. Electrochem. Soc., Vol. 141, No. 3, 1994, pp. 730-733.
47. Y. Shacham-Diamand, “Electroless Copper Deposition Using Glyoxylic Acid as Reducing Agent for Ultralarge Scale Integration Metallization,” Electrochemical and Solid-State Letters, Vol. 3, No. 6, 2000, pp. 279-282.
48. M. Pounovic and R. Arndt, “The Effect of Some Additives on Electroless Copper Deposition,” J. Electrochem. Soc., Vol. 130, 1983, pp. 794-799.
49. R. M. Lukes, Plating , Vol. 51, 1964, pp.1066-1073.
50. V. V. Svirdow, “Electroless Metal Deposition Aqueous Solution,” Byelorussian University, Minsk, Russia, 1987.
51. A. Hung, “Electroless Copper Deposition with Hypophosphite as Reducing Agent,” Plating and Surface Finishing, Vol. 75, 1988, pp. 62-68.
52. E. J. O’Sullivan and A. G. Schrott, “Electrolessly Deposited Diffusion Barriers for Microelectronics,” IBM J. Res. Develop., Vol. 42, No. 5, 1998, pp. 607-620.
53. A. Kohn, M. Eizenberg, Y. Shacham-Diamand, “Evaluation of Electroless Deposited Co(W,P) Thin Films as Diffusion Barriers for Copper Metallization ,” Microelectronic Engineering, Vol. 55, 2001, pp.297-303.
54. Y. Shacham-Diamand, Y. Sverdlov and N. Petrov, “Electroless Deposition of Thin-Film Cobalt-Tungsten-Phosphorus Layers Using Tungsten Phosphoric Acid ( H3[P(W3O10)4] ) for ULSI and MEMS Applications,” J. Electrochem. Soc., Vol. 148, No. 3, 2001, pp. C162-C167.
55. 石親樺, “銅及氮化鉭複合層應用於積體電路銅金屬化之擴散障礙特性研究,” 1999.
56. Binary Phase Diagram
57. M. H. Tsai and S.C. Sun, “Comparison of the diffusion barrier properties of chemical-vapor-deposited TaN and sputtered TaN between Cu and Si,” J. Appl. Phys., Vol. 79, No. 9, 1996, pp. 6932-6938
58. L. Magagnin, R. Maboudian and C. Carraro, “Selective Deposition of Thin Copper Films onto Silicon with Improved Adhesion,” Electrochemical and Solid- State Letters, Vol. 4, No. 1, 2001, pp. C5-C7.
59. A. M. Sullivan and P. A. Kohl, “Electro-oxidation of ascorbic acid in an aqueous citrate suffer solution,” Plating and Surface Finishing, Vol. 85, No.2, 1998, pp. 56-60.
60. 謝朝全, 置換活化法在Ta(N)/SiO2/Si基材上無電鍍銅膜之研究, 1990.
61. T. Smy and Y. Shacham-Diamand, “Simulation of Electroless Deposition of Cu Thin Films for Very Large Scale Integration Metallization,” J. Electrochem. Soc., Vol. 144, No. 6, 1997, pp. 2115-2122.