由於量子電腦擁有比傳統電腦更快速、更有效率的運算方式，所以近年來量子電腦成為現今科技極為重要的發展目標之一。量子位元為量子電腦的基本單位，以其為基礎而衍伸出的結構系統更是五花八門，目前主流的運算系統有量子點、離子井、鑽石空位、超導電路與拓樸量子位元。而此文將利用以約瑟夫森接面為核心的超導電路作為量子晶片的主要架構。

本篇論文利用半導體製程技術將超導電路實現在量子晶片上，其中利用黃光微影與濕式蝕刻製程形成微波共面波導，並利用電子束微影製程與Cross Junction薄膜蒸鍍來製做約瑟夫森接面及量子位元Transmon。

共面波導的設計阻抗為50Ω，製程後的實際阻抗為50.00至50.19Ω。約瑟夫森接面的設計線寬為140nm(設計面積為0.0196平方微米)，製程後的實際線寬為235.5至267.2nm (實際面積為0.0699至0.0746平方微米)，常溫電阻為4.85至5.24kΩ。

Because quantum computers have faster and more efficient computing performance than traditional computers in some situations, quantum computers have become one of the most important development goals of today's technology in recent years. The qubit is the basic unit of a quantum computer, and there are various structural systems derived from it. The current mainstream computing systems include quantum dots, ion wells, diamond vacancies, superconducting circuits, and topological qubits. This article will use the superconducting circuit with the Josephson junction as the key to the quantum chip.

This article uses semiconductor process technology to implement superconducting circuits on chip. Coplanar waveguides are manufactured by photolithography and wet etching processes; the Josephson Junction and Transmon are fabricated by electron beam lithography and Cross Junction thin film evaporation.

The design impedance of the coplanar waveguide is 50Ω, and the actual impedance after processing is 50.00 to 50.19 Ω. The designed line width of the Josephson junction is 140nm , which design area is 0.0196μm^2. The actual line width after the process is 235.5 to 267.2 nm, which actual area is 0.0699 to 0.0746 μm^2, and the normal resistance of Josephson Junction is 4.85 to 5.24 kΩ.

[1] R. P. Feynman, “Simulating physics with computers,” in Feynman and computation,
pp. 133–153, CRC Press, 2018.
[2] J. M. Martinis, M. H. Devoret, and J. Clarke, “Energy-level quantization in the zerovoltage
state of a current-biased josephson junction,” Physical review letters, vol. 55,
no. 15, p. 1543, 1985.
[3] M. H. Devoret, J. M. Martinis, and J. Clarke, “Measurements of macroscopic quantum
tunneling out of the zero-voltage state of a current-biased josephson junction,” Physical
review letters, vol. 55, no. 18, p. 1908, 1985.
[4] Y. Nakamura, Y. A. Pashkin, and J. Tsai, “Coherent control of macroscopic quantum states
in a single-cooper-pair box,” nature, vol. 398, no. 6730, pp. 786–788, 1999.
[5] A. Wallraff, D. I. Schuster, A. Blais, L. Frunzio, R.-S. Huang, J. Majer, S. Kumar, S. M.
Girvin, and R. J. Schoelkopf, “Strong coupling of a single photon to a superconducting
qubit using circuit quantum electrodynamics,” Nature, vol. 431, no. 7005, pp. 162–167,
2004.
[6] J. Koch, M. Y. Terri, J. Gambetta, A. A. Houck, D. I. Schuster, J. Majer, A. Blais, M. H.
Devoret, S. M. Girvin, and R. J. Schoelkopf, “Charge-insensitive qubit design derived
from the cooper pair box,” Physical Review A, vol. 76, no. 4, p. 042319, 2007.
[7] M. A. Nielsen and I. L. Chuang, “Quantum computation and quantum information,” Phys.
Today, vol. 54, no. 2, p. 60, 2001.
[8] B. D. Josephson, “Possible new effects in superconductive tunnelling,” Physics letters,
vol. 1, no. 7, pp. 251–253, 1962.
[9] R. Jaklevic, J. Lambe, A. Silver, and J. Mercereau, “Quantum interference effects in
josephson tunneling,” Physical Review Letters, vol. 12, no. 7, p. 159, 1964.
[10] T. Van Duzer and C. W. Turner, “Principles of superconductive devices and circuits,” 1981.
[11] T. Duty, D. Gunnarsson, K. Bladh, and P. Delsing, “Coherent dynamics of a josephson
charge qubit,” Physical Review B, vol. 69, no. 14, p. 140503, 2004.
[12] K. Lehnert, K. Bladh, L. Spietz, D. Gunnarsson, D. Schuster, P. Delsing, and
R. Schoelkopf, “Measurement of the excited-state lifetime of a microelectronic circuit,”
Physical review letters, vol. 90, no. 2, p. 027002, 2003.
[13] K. Koshino and Y. Nakamura, “Control of the radiative level shift and linewidth of a
superconducting artificial atom through a variable boundary condition,” New Journal of
Physics, vol. 14, no. 4, p. 043005, 2012.
[14] C. Quintana, A. Megrant, Z. Chen, A. Dunsworth, B. Chiaro, R. Barends, B. Campbell,
Y. Chen, I.-C. Hoi, E. Jeffrey, et al., “Characterization and reduction of microfabricationinduced
decoherence in superconducting quantum circuits,” Applied Physics Letters,
vol. 105, no. 6, p. 062601, 2014.
[15] K. Zhang, M.-M. Li, Q. Liu, H.-F. Yu, and Y. Yu, “Bridge-free fabrication process for
al/alox/al josephson junctions,” Chinese Physics B, vol. 26, no. 7, p. 078501, 2017.
[16] K. Kurihara, K. Iwadate, H. Namatsu, M. Nagase, H. Takenaka, and K. M. K. Murase, “An
electron beam nanolithography system and its application to si nanofabrication,” Japanese
journal of applied physics, vol. 34, no. 12S, p. 6940, 1995.
[17] B. Cord, J. Yang, H. Duan, D. C. Joy, J. Klingfus, and K. K. Berggren, “Limiting factors
in sub-10 nm scanning-electron-beam lithography,” Journal of Vacuum Science &
Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and
Phenomena, vol. 27, no. 6, pp. 2616–2621, 2009.
[18] S. Steenbrink, B. Kampherbeek, M. Wieland, J. Chen, S. Chang, M. Pas, J. Kretz,
C. Hohle, D. van Steenwinckel, S. Manakli, et al., “High throughput maskless lithography:
low voltage versus high voltage,” in Emerging Lithographic Technologies XII, vol. 6921,
pp. 547–556, SPIE, 2008.
[19] P. Kruit and S. Steenbrink, “Shot noise in electron-beam lithography and line-width measurements,”
Scanning, vol. 28, no. 1, pp. 20–26, 2006.
[20] B. E. M. B. E. Maile, W. H. W. Henschel, H. K. H. Kurz, B. R. B. Rienks, R. P. R. Polman,
and P. K. P. Kaars, “Sub-10 nm linewidth and overlay performance achieved with a
fine-tuned ebpg-5000 tfe electron beam lithography system,” Japanese Journal of Applied
Physics, vol. 39, no. 12S, p. 6836, 2000.
[21] 楊穎枚, “Electron beam lithography system,” 2011. https://cmnst-cfc.ncku.edu.tw/
var/file/197/1197/img/96/ELIONIX_ELS7500_SOP_20110418.pdf.
[22] P. D. H.-G. Braun, “Lab course-electron beam lithography,”