神經細胞藉由其自身之細胞膜電位進行訊號的編碼及傳遞，在膜電位變化的過程中離子通道的隨機開闔現象會隨之產生大量的低頻雜訊。由於離子通道隨機性的開關所造成的低頻雜訊頻譜，非常類似於電晶體由於介面陷阱產生低頻雜訊的機制。而此一低頻雜訊不僅不會對神經元間之溝通造成傷害，反而有助於神經元進行更穩健的訊號處理。隨著半導體製程的進步，電晶體尺寸不斷微縮，其低頻雜訊也不斷增強，影響了傳統積體電路的訊號處理的精確性。研究神經系統如何在低頻雜訊中進行訊號處理將可能使有助於改善目前積體電路設計之缺點。
若能在現有之神經細胞模型之中，加入雜訊可調變之電晶體，便可以產生類似神經細胞中之低頻雜訊。而研究這些雜訊所造成之影響便有助於神經系統在雜訊環境下之特性研究。於是如何在電路中使用雜訊可調變電晶體且不至於大幅影響原有電路特性變相當重要。
本論文選用了三種已證實具有雜訊可調變能力且使用CMOS標準製程之電晶體。由於不需要進行額外的製程調整，便可與現有神經細胞模型結合。並針對三種電晶體之結構以及直流電流特性進行分析，接著建立其直流電流模型。

Neurons encode and transmit information by changing its membrane potentials. The random opening and closing of ion channels in the process of membrane potential changing contributes to the 1/f noise spectrum. The 1/f noise caused by the random opening and closing of ion channels and which caused by the surface trap in the transistors are very similar. The 1/f noise is found to play a beneficial role rather than harmful role for neural communication. As the CMOS technology progressing, the transistor noise increases dramatically, and disturbs the accuracy of traditional VLSI signal processing. Studying how neural systems process the signal in 1/f noise may improve VLSI design.
Adding noise adaptable transistors into VLSI neuron model can model the 1/f noise in the neurons. Then studying how the effect caused by these noises contributes to study neuron systems in noisy environments. So how to use the noise adaptable transistor is become very important.
This thesis chooses three kinds of transistors using CMOS general process and the noise adaptability has been improved. Without additional process steps, they can be added to the existing neuron model. Then analysis the structure and the DC current characteristics of these transistors and build the DC current model.

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