研究生: |
莊維哲 Wei-Che Chuang |
---|---|
論文名稱: |
準確的模擬各種不同連接線之電感以協助高效能單封裝系統的設計 Accurate inductance modeling of various wirebonds for high-performance system-in-package designs |
指導教授: |
張克正
Keh-Jeng Chang |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 資訊工程學系 Computer Science |
論文出版年: | 2005 |
畢業學年度: | 93 |
語文別: | 中文 |
論文頁數: | 75 |
中文關鍵詞: | 電感 、自感 、互感 |
外文關鍵詞: | inductance, mutual inductance, loop inductance |
相關次數: | 點閱:2 下載:0 |
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近幾年來因為製程技術進步,短短幾年間從點35微米製程已經跨入90奈米製程甚至65奈米,也因為製程的支援,興起了一股系統單晶片 (SoC, System on Chip )與單封裝系統(SiP, System in Package)的風潮,但是克服系統單晶片在製程上的困難之後,系統單晶片尚有訊號完整性的問題,例如:數位與類比訊號互相之間的干擾。所以,將在幾十年來良率一直相當高的連接線(bonding wires)的技術應用在研發單封裝系統技術上,或許單封裝系統的效能會稍稍落後給系統單晶片,但是,單封裝系統也有其可發展的優點,例:debug較簡單, time-to-market較短,沒有類比與數位訊號互相干擾的問題等優點,單封裝系統的出現並不是要取代系統單晶片,只是提供另一個解決辦法。
當然除了效能稍落後給系統單晶片外, 單封裝系統還有一個需要解決的問題,就是電感(Inductance),製程不斷進度,效能不斷上升,也就使的頻率跟著變快,考慮Z = R + jωL, ω的部分從以往的幾十個MHz到現在幾個GHz,以往估計阻抗(impedance)只需考慮電阻(R)的部分,那是因為頻率不高,所以可以忽略掉電感(L)的影響,但是現在若不將電感的影響估算進來,會造成良率大幅降低的可能性增加。 計算電感有很多方式,我們採用了FastHenry L field solver這個軟體,雖然這個軟體遇到大尺寸的結構時,執行速度會頗慢,但是它的準確性卻是有目共睹,我的這篇論文旨在提供一個能夠增加電感抽取的速度但只需要小幅度犧牲準確性的方法。
利用FastHenry的L field solver建立的電感表格( Inductance Table),供查表程式當資料庫使用,每個結構需要的電感表格可能不同,所以查表程式會依據使用者輸入的結構來查詢適當的電感表格,即使需要的資料不在表格中,也可利用查表程式直接用內插法來求得估計電感過程中所需要的參考電感值。本篇論文所提供的方法可能只需要花數秒即可估計出所需的電感,而不需要在花費數分鐘去執行FastHenry。
Due to the semiconductor technology progresses, the process technology improves from .35um to 90nm and even to 65nm. Thus, there’s a trend that many companies make effort in developing SoC (system on a chip) and SiP (system in package). Both SoC and SiP have some advantages like small size and high performance, but they also have many difficulties in signal integrity. One signal integrity problem suffers from interconnects (on-chip), such as crosstalk issues between digital signal and analog signal interconnects and power level loss in power distribution interconnects. Compare SoC with SiP, SiP is based on bonding wires (off-chip) technology which yield is always high in the decades. Although the performance of SoC is slightly better than SiP, SiP has many advantages, such as easy debugging, short time-to-market, and less crosstalk or power level loss issues. SiP, which is not planned to replace SoC, provides another solution just.
In addition to performance issues, inductance issue is another important one. Because of increasing frequency, to consider about this equation Z = R + jωL, where ω = 2πf and f is frequency. So, when frequency increases from tens MHz to several GHz, then “jωL” becomes critical now for it dominates and increases Z. If we can’t extract the inductance precisely, we will get lower yield. Therefore, in the thesis, we use this software, FastHenry L field solver, to extract inductance precisely and propose a method which can accelerate inductance extraction with accuracy. Although FastHenry may spend lots of time to extract inductance when the input structure is bigger, its accuracy is outstanding.
In the proposed method, we write a program to generate FastHenry input files. First, it builds the inductance tables by using FastHenry. And with specified parameters of structures, look up program can locate the corresponding table for use later. That is, one table stands for one structure and the program will choose one based on user’s need. With the tables and information provided by user, the program can estimate inductance of the desired structures. We can get inductance in seconds by using look up program instead of using FastHenry which requires more execution time (several minutes) to extract inductance on the same structures.
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