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研究生： 鄭仁瑋
Cheng, Jen-Wei
論文名稱： 鍺基板上不同界面層工程的穿隧氧化層對電荷陷阱式記憶體操作特性
Engineering of tunneling oxide with different interfacial layers on operation characteristics of charge-trapping memory devices with Ge substrate
指導教授： 張廖貴術
Chang-Liao, Kuei-Shu
口試委員: 趙天生
Chao, Tien-Sheng
劉致為
Liu, Chee-Wee
學位類別： 碩士
Master
系所名稱： 原子科學院 - 工程與系統科學系
Department of Engineering and System Science
論文出版年： 2012
畢業學年度： 100
語文別： 中文
論文頁數： 129
中文關鍵詞： 快閃記憶體 、高介電值材料 、鍺基板 、界面層
外文關鍵詞： flash memory, high-k, Ge-substrate, interfacial layer
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    • 由於浮動式閘極快閃記憶體無法滿足元件微縮發展的趨勢，因此利用電荷陷阱式快閃記憶體式取代浮動式閘極結構元件是未來發展的趨勢。然而傳統SONOS元件以氮化矽做為電荷儲存層的結構，在發展到次微米以下時就無法再以降低穿隧氧化層厚度的方式來提升元件操作效率，因此便引進了高介電值材料來取代傳統ONO結構以提升元件操作特性。而使用鍺基板取代矽基板，藉由能帶工程讓通道上會有更多的電子電洞對可以被產生，希望藉此異質材料的應用可以達到較快的操作速度。
    本實驗用電容結構，在穿隧氧化層中，比較不同電漿處理的界面層，藉由改變界面層材料及堆疊的結構，探討對於電荷陷阱式快閃記憶體元件的效率影響。以電容結構，為了先模擬一個在鍺基板上的快閃記憶體電容元件，我們首先在鍺基板上選擇簡單易形成的界面層，二氧化鍺應用於快閃記憶體上。並發現二氧化鍺堆疊的界面層擁有好的品質。之後，再比較二氧化鍺和氮氧化鍺不同界面層的操作特性，藉由堆疊的界面層方式，來探討對於電荷陷阱快閃記憶體元件的操作特性影響。最後再以電容結構，比較單層或堆疊的氮氧化鋁以及比較不同的界面層，來探討界面層對於電荷陷阱快閃記憶體元件的操作特性影響。
    而經由實驗結果發現，使用二氧化鍺作為界面層的元件，可以有效的提升快閃記憶體的操作速度，而且可靠度在可接受的範圍。使用氮氧化鍺作為界面層的元件，耐久力可以接近100K次，而氮氧化鋁作為界面層的元件，特性則在前兩者界面層材料之間。皆具有比矽基板元件更快的操作速度，並同時能些許提升快閃記憶體之可靠度特性。

    目錄 摘要 Ⅰ 致謝 Ⅱ 目錄 Ⅲ 表目錄 Ⅳ 圖目錄 Ⅴ 第一章 序論 1 1.1 前言 1 1.2 快閃記憶體面臨問題 1 1.3 電荷陷阱式快閃記憶體的結構及其優缺點 2 1.4 研究目的 4 1.5 各章摘要 6 第二章 快閃記憶體元件操作方法 12 2.1 寫入與抹除方法 12 2.1.1 CHEI通道熱電子注入寫入 12 2.1.2 CHISEL初始通道載子引發二次電子注入寫入 13 2.1.3 BBHE帶對帶穿隧引發熱電子寫入 13 2.1.4 FN穿隧寫入 14 2.1.5 FN穿隧抹除 15 2.2 耐久力 15 2.3 干擾 16 2.4 電荷保持力 17 第三章 實驗規劃及元件製程 29 3.1 實驗規劃 29 3.2 使用不同界面層的電容元件製程 30 3.2.1 前段製程 30 3.2.2 成長穿隧氧化層 31 3.2.3 沉積電荷儲存層以及阻擋層 32 3.2.4 後段製程 33 第四章 鍺基板上使用二氧化鍺(GeO2)界面層作為穿隧氧化層對電荷陷阱式記憶體電容元件影響 45 4.1 研究背景與目的 45 4.2 實驗規劃及製程 47 4.2.1 形成GeO2界面層的電漿參數 47 4.2.2 實驗流程 48 4.3 實驗結果與討論 49 4.3.1 GeO2界面層在FN操作下電性的討論 50 4.3.1.1 不同電漿處理的堆疊元件的FN寫入及FN抹除速度比較 50 4.3.1.2 不同電漿處理的堆疊元件的等效氧化層厚度(EOT)比較 51 4.3.1.3 不同電漿處理的堆疊元件的電荷保持力比較 52 4.3.1.4 『H2O plasma Al2O3 35 Å』元件的耐久力 52 4.3.2『O2 plasma Al2O3 35 Å』和『H2O plasma Al2O3 35 Å』的物性分析 53 4.3.2.1 Transmission electron microscopy(TEM) 53 4.3.2.2 Secondary ion mass spectroscopy(SIMS) 53 4.3.2.3 X-ray photoelectron spectrometer(XPS) 54 4.4 結論 54 第五章 鍺基板上使用氮氧化鍺(GeON)界面層作為穿隧氧化層對電荷陷阱式記憶體電容元件特性影響 75 5.1 研究背景與目的 75 5.2 實驗規劃及製程 76 5.2.1 形成GeON界面層的電漿參數 76 5.2.2 實驗流程 78 5.3 實驗結果與討論 79 5.3.1 GeON界面層在FN操作下所有元件電性的討論 80 5.3.1.1 不同電漿處理的堆疊元件的FN寫入及FN抹除速度比較 80 5.3.1.2 不同電漿處理的堆疊元件的等效氧化層厚度(EOT)比較 82 5.3.1.3 不同電漿處理的堆疊元件的電荷保持力比較 82 5.3.1.4 『O2 plasma Al2O3 35 Å』元件的耐久力 82 5.3.2 GeON界面層和GeO2界面層的元件特性比較 83 5.3.2.1 GeON和GeO2界面層元件的FN寫入及FN抹除速度比較 83 5.3.2.2 GeON和GeO2界面層元件的電荷保持力比較 84 5.3.2.3 GeO2界面層的元件『H2O plasma Al2O3 35 Å』和GeON界面層的元件『O2 plasma Al2O3 35 Å』的耐久力比較 85 5.4 結論 86 第六章 鍺基板上使用氮氧化鋁(AlON)界面層作為穿隧氧化層對電荷陷阱式記憶體電容元件特性影響 104 6.1 研究背景與目的 104 6.2 實驗規劃及製程 105 6.2.1 形成AlON界面層的參數測試 105 6.2.2 實驗流程 107 6.3 實驗結果與討論 107 6.3.1 AlON界面層在FN操作下所有元件電性的討論 108 6.3.1.1 FN寫入及FN抹除速度比較 108 6.3.1.2 等效氧化層厚度(EOT)比較 110 6.3.1.3 電荷保持力比較 110 6.3.1.4 『AlON 15 Å Al2O3 20 Å』元件的耐久力 111 6.3.2 比較GeO2、GeON、AlON不同界面層的元件特性比較 111 6.3.2.1 比較不同界面層元件的FN寫入及FN抹除速度 111 6.3.2.2 比較不同界面層元件的電荷保持力 112 6.3.2.3 比較不同界面層元件的耐久力 112 6.4 結論 112 第七章 結論與建議 122 7.1 結論 122 7.2 未來研究方向 123 參考資料 124

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